From patchwork Wed Feb 11 17:43:12 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mason X-Patchwork-Id: 5813961 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E7D309F30C for ; Wed, 11 Feb 2015 17:46:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1740720218 for ; Wed, 11 Feb 2015 17:46:28 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 338EC200E7 for ; Wed, 11 Feb 2015 17:46:27 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YLbKQ-0001T5-Ep; Wed, 11 Feb 2015 17:43:58 +0000 Received: from smtp4-g21.free.fr ([212.27.42.4]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YLbKL-0001KD-5z for linux-arm-kernel@lists.infradead.org; Wed, 11 Feb 2015 17:43:54 +0000 Received: from [10.10.27.31] (unknown [216.253.230.99]) (Authenticated sender: shill) by smtp4-g21.free.fr (Postfix) with ESMTPSA id 3E05A4C80AF; Wed, 11 Feb 2015 18:43:12 +0100 (CET) Message-ID: <54DB94B0.8020000@free.fr> Date: Wed, 11 Feb 2015 09:43:12 -0800 From: Mason User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:35.0) Gecko/20100101 Firefox/35.0 SeaMonkey/2.32 MIME-Version: 1.0 To: Stephen Boyd Subject: Re: Delays, clocks, timers, hrtimers, etc References: <54C8E125.3070905@free.fr> <54D52F84.9050600@free.fr> <266c7b1ff2d1a8ba0ae4866f4fb4eca5@agner.ch> <54D576B1.4000001@free.fr> <54D903F6.3050608@codeaurora.org> <54D93556.9050008@free.fr> <54D93FFA.3090506@codeaurora.org> <54D947B4.4080401@free.fr> In-Reply-To: <54D947B4.4080401@free.fr> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150211_094353_406065_187B4826 X-CRM114-Status: GOOD ( 22.02 ) X-Spam-Score: -0.7 (/) Cc: Mark Rutland , Rob Herring , Linux PM , Peter Zijlstra , Linus Walleij , cpufreq , John Stultz , Stefan Agner , Thomas Gleixner , Shawn Guo , Linux ARM X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Mason wrote: > Stephen Boyd wrote: > >> Mason wrote: >> >>> My platform provides a 32-bit counter, ticking at a constant 27 MHz. >>> Reading this counter has a latency of roughly 70 ns (it has to go >>> over the system memory bus). I think this is good enough for both >>> the clock source and sched_clock, is it not? >>> >>> So the plan would be: >>> - clocksource and sched_clock : 27 MHz, 32-bit counter, platform >>> - clockevents : TWD, standard >> >> Yep, that sounds like a good plan. If your platform has the ARM global >> timer (drivers/clocksource/arm_global_timer.c) then you don't need >> anything besides that timer because it provides both the clocksource, >> sched_clock, and clockevents. Sounds like you don't have that timer > > I'm using Cortex A9, so I do have the global timer (AFAIU). > > However, I don't think I can safely use it as a clock source because > I'm also using cpufreq, and I don't think the arm_global_timer driver > handles CPU frequency updates, while the TWD driver does (?) > > /* > * Updates clockevent frequency when the cpu frequency changes. > * Called on the cpu that is changing frequency with interrupts disabled. > */ > > "The Interrupt Controller, global timer, private timers, and watchdogs > are clocked with PERIPHCLK." And PERIPHCLK is tied to CLK, which is > modified by cpufreq. I didn't see any code in the arm_global_timer > driver to deal with with that. > > Did I overlook something fundamental? > >> though, so you have to write a driver for your custom platform timer and >> at least hook up clocksource and sched_clock to it. If you have >> interrupts with your platform timer you can skip out on TWD and also >> register a clockevent in your platform timer driver. > > Registering a clock source or a sched_clock seems straight-forward. > All I need to provide is a function to read the platform counter. > > However, why would I skip out on TWD? > (I'm trying to minimize code needed for the port.) Please forgive me for piling on extra questions: Cortex A9 provides the global timer, and the local timers/watchdog, both of which can be used for clockevents, AFAICT. Are there other choices available, or are these the only (standard) options? Also, you wrote "I don't see any problem with the TWD dropping the dependency on SMP." Would something as simple as this be acceptable? (Most probably NOT; there are a lot of smp* occurrences in smp_twd.c even the file name.) What is the rationale for the dependency? Regards. diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a34698d..47b02c8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1565,7 +1565,6 @@ config HAVE_ARM_ARCH_TIMER config HAVE_ARM_TWD bool - depends on SMP select CLKSRC_OF if OF help This options enables support for the ARM timer and watchdog unit