| Message ID | 54f17420e7532087c4c63db46a282bfc1678d39e.1476704881.git-series.maxime.ripard@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Oct 17, 2016 at 7:49 PM, Maxime Ripard <maxime.ripard@free-electrons.com> wrote: > The I2C1 and SPI2 buses are exposed on the CHIP headers, and are not > explicitly dedicated to anything. > > Add them to the DTS with the muxing already set, but keep them disabled. > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> The CHIP docs don't mention SPI2 though.
diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts index 059d86865b73..c6da5ad37152 100644 --- a/arch/arm/boot/dts/sun5i-r8-chip.dts +++ b/arch/arm/boot/dts/sun5i-r8-chip.dts @@ -56,9 +56,11 @@ aliases { i2c0 = &i2c0; + i2c1 = &i2c1; i2c2 = &i2c2; serial0 = &uart1; serial1 = &uart3; + spi0 = &spi2; }; chosen { @@ -126,6 +128,12 @@ #include "axp209.dtsi" +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "disabled"; +}; + &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&i2c2_pins_a>; @@ -257,6 +265,12 @@ status = "okay"; }; +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_a>; + status = "disabled"; +}; + &tcon0 { status = "okay"; };
The I2C1 and SPI2 buses are exposed on the CHIP headers, and are not explicitly dedicated to anything. Add them to the DTS with the muxing already set, but keep them disabled. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> --- arch/arm/boot/dts/sun5i-r8-chip.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+), 0 deletions(-)