From patchwork Wed Apr 1 09:21:30 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 6138581 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 46EC2BF4A6 for ; Wed, 1 Apr 2015 09:24:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 55CC0202E6 for ; Wed, 1 Apr 2015 09:24:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 53043202D1 for ; Wed, 1 Apr 2015 09:24:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YdEqU-000407-B0; Wed, 01 Apr 2015 09:21:58 +0000 Received: from down.free-electrons.com ([37.187.137.238] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YdEqP-0003qP-3I for linux-arm-kernel@lists.infradead.org; Wed, 01 Apr 2015 09:21:54 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id A6AF642F; Wed, 1 Apr 2015 11:21:45 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from [192.168.0.19] (von69-1-88-162-9-206.fbx.proxad.net [88.162.9.206]) by mail.free-electrons.com (Postfix) with ESMTPSA id EBFBD420; Wed, 1 Apr 2015 11:21:44 +0200 (CEST) Message-ID: <551BB89A.60405@free-electrons.com> Date: Wed, 01 Apr 2015 11:21:30 +0200 From: Gregory CLEMENT User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.4.0 MIME-Version: 1.0 To: Marcin Wojtas Subject: Re: [PATCH 0/5] Add standby support for the recent mvebu SoCs References: <1427724278-12379-1-git-send-email-gregory.clement@free-electrons.com> In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150401_022153_486477_51212D2F X-CRM114-Status: GOOD ( 22.36 ) X-Spam-Score: -0.0 (/) Cc: Thomas Petazzoni , Andrew Lunn , Jason Cooper , Tawfik Bayouk , Boris BREZILLON , linux-kernel@vger.kernel.org, Nadav Haklai , Lior Amsalem , Ezequiel Garcia , Thomas Gleixner , Maxime Ripard , "linux-arm-kernel@lists.infradead.org" , Sebastian Hesselbarth X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Marcin, On 01/04/2015 11:02, Marcin Wojtas wrote: > Hi Gregory, > > When I run standby on A385 I get following error: > root@localhost:~# echo standby > /sys/power/state > [ 122.889266] PM: System core suspend callback > mvebu_mbus_suspend+0x0/0xf4 failed. > > Did you see this issue in your setup? Yes the mbus driver for the Armada 38x must be updated. As Thomas worked on it I didn't put it in the series. I have just create the patch needed you can try it, and I will add it in the next version of the series. Thanks, Gregory > > Best regards, > Marcin > > 2015-03-30 16:04 GMT+02:00 Gregory CLEMENT : >> Hi, >> >> Until now only one Armada XP based board supported suspend to >> ram. This suspend to ram mode was unusual because it involved shutting >> down the SoC and relied on a PIC to wake up the system. >> >> However, most of the recent mvebu SoCs can support the standby >> mode. Unlike for the suspend to ram, nothing special have to be done >> for these SoCs. In this mode the SoCs go in idle mode (but they remain >> powered up) and the devices enter in suspend mode. The support itself >> was added in the patch 2. >> >> In order to wake-up the interrupt controller driver have been >> updated. As in standby mode the interrupt controller is not shutdown, >> any interrupt can be a wake-up source. So the MPIC (patch 4) and the >> GIC (patch 3) now used the flags IRQCHIP_SKIP_SET_WAKE and >> IRQCHIP_MASK_ON_SUSPEND. >> >> A wake up source is supposed to work in suspend _and_ in standby mode >> but for the mvebu SoCs, no interrupt can wake up the system. The last >> patch warns the user about it. >> >> The first patch is a clean-up found while working on this series >> >> All the patch are independents either for building or for running. >> >> Thanks, >> >> Gregory >> >> >> Gregory CLEMENT (5): >> ARM: mvebu: Use __init for the PM initialization functions >> ARM: mvebu: Add standby support >> ARM: mvebu: Allow using the GIC for wakeup in standby mode >> irqchip: armada-370-xp: Allow using wakeup source >> ARM: mvebu: Warn about the wake-ups sources not taken into account in >> suspend >> >> arch/arm/mach-mvebu/board-v7.c | 7 +++++ >> arch/arm/mach-mvebu/common.h | 5 ++-- >> arch/arm/mach-mvebu/pm-board.c | 15 ++++++---- >> arch/arm/mach-mvebu/pm.c | 57 ++++++++++++++++++++++++++++++++----- >> drivers/irqchip/irq-armada-370-xp.c | 1 + >> 5 files changed, 70 insertions(+), 15 deletions(-) >> >> -- >> 2.1.0 >> >> >> _______________________________________________ >> linux-arm-kernel mailing list >> linux-arm-kernel@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From 24f3e86d1abcecec0595cdf7550f228f994f3426 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Wed, 1 Apr 2015 11:16:56 +0200 Subject: [PATCH] ARM: mvebu: adjust mbus controller description on Armada 38x AS for the Armada 370 and the Armada XP, in order to support suspend(or standby)/resume on Armada 38x, an additional set of registers need to be described at the MBus controller level. This commit therefore adjusts the Device Tree of the Armada 38x SoC to include those registers in the MBus controller description. Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/armada-38x.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index 1dff30a81e24..900f7f7f407f 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -365,7 +365,8 @@ mbusc: mbus-controller@20000 { compatible = "marvell,mbus-controller"; - reg = <0x20000 0x100>, <0x20180 0x20>; + reg = <0x20000 0x100>, <0x20180 0x20>, + <0x20250 0x8>; }; mpic: interrupt-controller@20000 { -- 2.1.0