diff mbox series

[v2] clk: imx8mq: Add dsi_ipg_div

Message ID 55a0abac1c2efc4921588ee87986da43af1eb35a.1556802190.git.agx@sigxcpu.org (mailing list archive)
State Mainlined, archived
Commit 4d13c67adf4d1a6c097d3eb4e55bf28618980cd7
Headers show
Series [v2] clk: imx8mq: Add dsi_ipg_div | expand

Commit Message

Guido Günther May 2, 2019, 1:07 p.m. UTC
It's defined in imx8mq-clock.h but wasn't assigned yet. It's used as
clk_tx_esc in the nwl dsi host controller (i.MX8MQ RM, Rev. 0, 01/2018
Sect. 13.5.3.7.4).

Signed-off-by: Guido Günther <agx@sigxcpu.org>
---
This is basically a resend January with a slightly more exhaustive
commit message.

 drivers/clk/imx/clk-imx8mq.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Fabio Estevam May 2, 2019, 1:52 p.m. UTC | #1
On Thu, May 2, 2019 at 10:07 AM Guido Günther <agx@sigxcpu.org> wrote:
>
> It's defined in imx8mq-clock.h but wasn't assigned yet. It's used as
> clk_tx_esc in the nwl dsi host controller (i.MX8MQ RM, Rev. 0, 01/2018
> Sect. 13.5.3.7.4).
>
> Signed-off-by: Guido Günther <agx@sigxcpu.org>

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Stephen Boyd May 2, 2019, 8:26 p.m. UTC | #2
Quoting Guido Günther (2019-05-02 06:07:38)
> It's defined in imx8mq-clock.h but wasn't assigned yet. It's used as
> clk_tx_esc in the nwl dsi host controller (i.MX8MQ RM, Rev. 0, 01/2018
> Sect. 13.5.3.7.4).
> 
> Signed-off-by: Guido Günther <agx@sigxcpu.org>
> ---

Applied to clk-next
diff mbox series

Patch

diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index a9b3888aef0c..daf1841b2adb 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -458,6 +458,7 @@  static int imx8mq_clocks_probe(struct platform_device *pdev)
 	clks[IMX8MQ_CLK_DSI_DBI] = imx8m_clk_composite("dsi_dbi", imx8mq_dsi_dbi_sels, base + 0xbc00);
 	clks[IMX8MQ_CLK_DSI_ESC] = imx8m_clk_composite("dsi_esc", imx8mq_dsi_esc_sels, base + 0xbc80);
 	clks[IMX8MQ_CLK_DSI_AHB] = imx8m_clk_composite("dsi_ahb", imx8mq_dsi_ahb_sels, base + 0x9200);
+	clks[IMX8MQ_CLK_DSI_IPG_DIV] = imx_clk_divider2("dsi_ipg_div", "dsi_ahb", base + 0x9280, 0, 6);
 	clks[IMX8MQ_CLK_CSI1_CORE] = imx8m_clk_composite("csi1_core", imx8mq_csi1_core_sels, base + 0xbd00);
 	clks[IMX8MQ_CLK_CSI1_PHY_REF] = imx8m_clk_composite("csi1_phy_ref", imx8mq_csi1_phy_sels, base + 0xbd80);
 	clks[IMX8MQ_CLK_CSI1_ESC] = imx8m_clk_composite("csi1_esc", imx8mq_csi1_esc_sels, base + 0xbe00);