Message ID | 5607ea5d992f98051e51bcf30ab28f4a7b065515.1587742492.git-series.maxime@cerno.tech (mailing list archive) |
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Fri, 24 Apr 2020 11:35:58 -0400 (EDT) From: Maxime Ripard <maxime@cerno.tech> To: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>, Eric Anholt <eric@anholt.net> Subject: [PATCH v2 26/91] ARM: dts: bcm2711: Add HDMI DVP Date: Fri, 24 Apr 2020 17:34:07 +0200 Message-Id: <5607ea5d992f98051e51bcf30ab28f4a7b065515.1587742492.git-series.maxime@cerno.tech> X-Mailer: git-send-email 2.26.0 In-Reply-To: <cover.d1e741d37e43e1ba2d2ecd93fc81d42a6df99d14.1587742492.git-series.maxime@cerno.tech> References: <cover.d1e741d37e43e1ba2d2ecd93fc81d42a6df99d14.1587742492.git-series.maxime@cerno.tech> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200424_083602_148483_07048BF9 X-CRM114-Status: UNSURE ( 7.80 ) X-CRM114-Notice: Please train this message. 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Series |
drm/vc4: Support BCM2711 Display Pipeline
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expand
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diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi index a91cf68e3c4c..00bcaed1be32 100644 --- a/arch/arm/boot/dts/bcm2711.dtsi +++ b/arch/arm/boot/dts/bcm2711.dtsi @@ -12,6 +12,13 @@ interrupt-parent = <&gicv2>; + clk_108MHz: clk-108M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <108000000>; + clock-output-names = "108MHz-clock"; + }; + soc { /* * Defined ranges: @@ -244,6 +251,14 @@ hvs@7e400000 { interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; }; + + dvp: clock@7ef00000 { + compatible = "brcm,brcm2711-dvp"; + reg = <0x7ef00000 0x10>; + clocks = <&clk_108MHz>; + #clock-cells = <1>; + #reset-cells = <1>; + }; }; /*
Now that we have a driver for the DVP, let's add its DT node. Signed-off-by: Maxime Ripard <maxime@cerno.tech> --- arch/arm/boot/dts/bcm2711.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+)