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[78.235.100.105]) by smtp.gmail.com with ESMTPSA id r13sm17554986wmg.12.2015.11.02.03.14.23 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 02 Nov 2015 03:14:23 -0800 (PST) From: Neil Armstrong Subject: [PATCH 1/3] arm: plat-omap: dmtimer: Add clock source from DT To: Thierry Reding , Tony Lindgren , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, Grant Erickson , NeilBrown , Joachim Eastwood Organization: Baylibre Message-ID: <56374586.1040700@baylibre.com> Date: Mon, 2 Nov 2015 12:14:14 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151102_031446_648976_78DBCCB3 X-CRM114-Status: GOOD ( 16.58 ) X-Spam-Score: -1.2 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a function which sets the timer source from the clocks binding on dm_timer_prepare call. In case the clocks property is not valid, it falls back to the set_source() with 32_KHZ clock as default. Suggested-by: Tony Lindgren Signed-off-by: Neil Armstrong --- arch/arm/plat-omap/dmtimer.c | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 8ca94d3..7c7f260 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -137,6 +137,31 @@ static int omap_dm_timer_reset(struct omap_dm_timer *timer) return 0; } +static int omap_dm_timer_of_set_source(struct omap_dm_timer *timer) +{ + int ret; + struct clk *parent; + + /* + * FIXME: OMAP1 devices do not use the clock framework for dmtimers so + * do not call clk_get() for these devices. + */ + if (!timer->fclk) + return -ENODEV; + + parent = clk_get(&timer->pdev->dev, NULL); + if (IS_ERR(parent)) + return -ENODEV; + + ret = clk_set_parent(timer->fclk, parent); + if (ret < 0) + pr_err("%s: failed to set parent\n", __func__); + + clk_put(parent); + + return ret; +} + static int omap_dm_timer_prepare(struct omap_dm_timer *timer) { int rc; @@ -166,7 +191,11 @@ static int omap_dm_timer_prepare(struct omap_dm_timer *timer) __omap_dm_timer_enable_posted(timer); omap_dm_timer_disable(timer); - return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); + rc = omap_dm_timer_of_set_source(timer); + if (rc == -ENODEV) + return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); + + return rc; } static inline u32 omap_dm_timer_reserved_systimer(int id)