From patchwork Sat Mar 26 13:08:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: zhangjian X-Patchwork-Id: 8674571 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3B2D99F3D1 for ; Sat, 26 Mar 2016 13:12:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 48E1D20253 for ; Sat, 26 Mar 2016 13:12:25 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E740320256 for ; Sat, 26 Mar 2016 13:12:23 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ajnym-0003ud-9l; Sat, 26 Mar 2016 13:10:12 +0000 Received: from [119.145.14.199] (helo=szxga05-in.huawei.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ajnyh-0002h0-L0 for linux-arm-kernel@lists.infradead.org; Sat, 26 Mar 2016 13:10:09 +0000 Received: from 172.24.1.45 (EHLO lggeml422-hub.china.huawei.com) ([172.24.1.45]) by szxrg05-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id AQS18653; Sat, 26 Mar 2016 21:03:56 +0800 (CST) Received: from [127.0.0.1] (10.111.72.170) by lggeml422-hub.china.huawei.com (10.72.61.32) with Microsoft SMTP Server id 14.3.235.1; Sat, 26 Mar 2016 21:08:51 +0800 Subject: Re: [RFC5 PATCH v6 00/21] ILP32 for ARM64 To: Yury Norov , Andreas Schwab References: <1452792198-10718-1-git-send-email-ynorov@caviumnetworks.com> <56AB3805.1040308@huawei.com> <20160129170929.GA3543@yury-N73SV> <56AC38F1.2030608@huawei.com> <20160218223506.GA7816@yury-N73SV> <20160225202855.GD16123@yury-N73SV> <56EBD84D.2060009@huawei.com> <20160318154918.GA1595@yury-N73SV> <20160321184012.GA26563@yury-N73SV> From: "Zhangjian (Bamvor)" Message-ID: <56F689D9.2090800@huawei.com> Date: Sat, 26 Mar 2016 21:08:41 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.1.0 MIME-Version: 1.0 In-Reply-To: <20160321184012.GA26563@yury-N73SV> X-Originating-IP: [10.111.72.170] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020205.56F689F2.0224, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 3440f6b6474cc4e5a1c79d5df184ab8c X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160326_061008_268280_FCC0B7F1 X-CRM114-Status: GOOD ( 13.07 ) X-Spam-Score: -1.1 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: young.liuyang@huawei.com, "Zhangjian \(Bamvor\)" , arnd@arndb.de, pinskia@gmail.com, Prasun.Kapoor@caviumnetworks.com, catalin.marinas@arm.com, "jijun \(D\)" , heiko.carstens@de.ibm.com, linux-kernel@vger.kernel.org, agraf@suse.de, klimov.linux@gmail.com, broonie@kernel.org, jan.dakinevich@gmail.com, joseph@codesourcery.com, gaoyongliang@huawei.com, yangyingliang@huawei.com, schwidefsky@de.ibm.com, Nathan_Lynch@mentor.com, Bamvor Zhang Jian , linux-arm-kernel@lists.infradead.org, christoph.muellner@theobroma-systems.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi, Yury On 2016/3/22 2:40, Yury Norov wrote: > On Mon, Mar 21, 2016 at 10:07:49AM +0100, Andreas Schwab wrote: [...] > > Hi Andreas, > > Thank you for your patch. It seems like it fixed a couple of tests. > I applied it to the library branch. Current list of fails is like this: > float_bessel FAIL 137 > float_exp_log FAIL 137 > float_iperb FAIL 137 > float_power FAIL 137 > float_trigo FAIL 137 > pipeio_3 FAIL 5 > abort01 FAIL 2 > clone02 FAIL 4 > kill10 FAIL 2 > kill11 FAIL 2 > mmap16 FAIL 6 > nftw01 FAIL 1 > nftw6401 FAIL 1 > open12 FAIL 2 > pathconf01 FAIL 1 > profil01 FAIL 1 > rename11 FAIL 2 > rmdir02 FAIL 2 > umount2_01 FAIL 2 > umount2_02 FAIL 2 > umount2_03 FAIL 2 > utime06 FAIL 2 > mtest06 FAIL 11 This is a patch for glibc. I found 64bit register is used in sysdep.h. It could fix some failure in bigendian. I do not test it on little endian yet. Hope It helps. Regards Bamvor From a4af2b7a8903ac5e033ba838ec3328bdeb1113ba Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Thu, 13 Nov 2014 16:05:58 +0800 Subject: [PATCH] ARM64: ILP32: change register x1 to PTR_REG It should use 32-bit register instead of 64-bit register in ILP32. Suggested-by: Andrew Pinski Signed-off-by: Yang Yingliang Signed-off-by: Bamvor Jian Zhang --- sysdeps/aarch64/sysdep.h | 2 +- sysdeps/unix/sysv/linux/aarch64/sysdep.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sysdeps/aarch64/sysdep.h b/sysdeps/aarch64/sysdep.h index 6673242..742d23c 100644 --- a/sysdeps/aarch64/sysdep.h +++ b/sysdeps/aarch64/sysdep.h @@ -104,7 +104,7 @@ #define LDST_GLOBAL(OP, R, T, EXPR) \ adrp x##T, :got:EXPR; \ ldr PTR_REG (T), [x##T, #:got_lo12:EXPR]; \ - OP x##R, [x##T]; + OP PTR_REG (R), [x##T]; /* Since C identifiers are not normally prefixed with an underscore on this system, the asm identifier `syscall_error' intrudes on the diff --git a/sysdeps/unix/sysv/linux/aarch64/sysdep.h b/sysdeps/unix/sysv/linux/aarch64/sysdep.h index 2bfec77..8fb8a6b 100644 --- a/sysdeps/unix/sysv/linux/aarch64/sysdep.h +++ b/sysdeps/unix/sysv/linux/aarch64/sysdep.h @@ -108,7 +108,7 @@ .Lsyscall_error: \ adrp x1, :gottprel:errno; \ neg w2, w0; \ - ldr x1, [x1, :gottprel_lo12:errno]; \ + ldr PTR_REG(1), [x1, :gottprel_lo12:errno]; \ mrs x3, tpidr_el0; \ mov x0, -1; \ str w2, [x1, x3]; \