From patchwork Sun Nov 11 04:39:24 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 1724791 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id AD514DF288 for ; Sun, 11 Nov 2012 04:43:09 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TXPLC-0006qn-90; Sun, 11 Nov 2012 04:40:14 +0000 Received: from mail-da0-f49.google.com ([209.85.210.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TXPL6-0006qN-5R for linux-arm-kernel@lists.infradead.org; Sun, 11 Nov 2012 04:40:09 +0000 Received: by mail-da0-f49.google.com with SMTP id q27so2059225daj.36 for ; Sat, 10 Nov 2012 20:40:06 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :in-reply-to:references:x-gm-message-state; bh=3GmGPhauDKtlnU/bBImFVGv1FWh3PbFNXTRGM2DJ9W4=; b=UTjrBn8ZvcrgZzxN29JnNUbaCviOWJt44ueOXgO6j3KYXXvBw7+rfA4YLx4RBQpA8r PM1AGnc9vbvMPaxPtR3i397BaxXhtmcIpaviNEXUJYy4cVCbj6ZiOEwCsDBugLmSbZit PEqD/SdHDYSJjZLe8/cHiMIZTMtlBjgPoXKHiIO/qaSDYMpIzBGUhGI6htEWzv0cmZSF o3NKSzXxeCie97EWjc+yNQxyUZ4ijLWuKNEKWaMMe5DBx5IX359otFtmYZ8VfQYS7Xvu 9LfwkzPh8XKPS5zj5NhAuoWQ80rhwTgSWAXy5lM6oGV6c2sdCkSjuve6VYZEh5V0yjbi U7cA== Received: by 10.68.230.2 with SMTP id su2mr14480238pbc.54.1352608806044; Sat, 10 Nov 2012 20:40:06 -0800 (PST) Received: from localhost ([122.178.255.135]) by mx.google.com with ESMTPS id t1sm2003906paw.11.2012.11.10.20.40.02 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 10 Nov 2012 20:40:05 -0800 (PST) From: Viresh Kumar To: arm@kernel.org, olof@lixom.net, arnd@arndb.de Subject: [PATCH 02/14] ARM: SPEAr13xx: DT: Add spics gpio controller nodes Date: Sun, 11 Nov 2012 10:09:24 +0530 Message-Id: <58a7d91cab20b924784fb5a09e16ca08e6f13318.1352608333.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 1.7.12.rc2.18.g61b472e In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQkkYbF8f/5NdY/uLjdEKquHPwj7y0Cs7KQ+6reVZMG7CHUl1tnx5uSW9AJ+UgZ7AK6rnLdi X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121110_234008_534970_58ABEBF8 X-CRM114-Status: UNSURE ( 9.57 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Viresh Kumar , devicetree-discuss@lists.ozlabs.org, spear-devel@list.st.com, sr@denx.de, Linus Walleij , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Shiraz Hashim SPEAr platform provides a provision to control chipselects of ARM PL022 Prime Cell spi controller through its system registers, which otherwise remains under PL022 control which some protocols do not want. This patch adds spics controller nodes in device tree for various SPEAr13xx SoCs. Cc: Linus Walleij Signed-off-by: Shiraz Hashim Reviewed-by: Vipin Kumar Signed-off-by: Viresh Kumar Acked-by: Linus Walleij --- arch/arm/boot/dts/spear1310.dtsi | 12 ++++++++++++ arch/arm/boot/dts/spear1340.dtsi | 14 ++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi index 419ea74..d5661ee 100644 --- a/arch/arm/boot/dts/spear1310.dtsi +++ b/arch/arm/boot/dts/spear1310.dtsi @@ -17,6 +17,18 @@ compatible = "st,spear1310"; ahb { + spics: spics@e0700000{ + compatible = "st,spear-spics-gpio"; + reg = <0xe0700000 0x1000>; + st-spics,peripcfg-reg = <0x3b0>; + st-spics,sw-enable-bit = <12>; + st-spics,cs-value-bit = <11>; + st-spics,cs-enable-mask = <3>; + st-spics,cs-enable-shift = <8>; + gpio-controller; + #gpio-cells = <2>; + }; + ahci@b1000000 { compatible = "snps,spear-ahci"; reg = <0xb1000000 0x10000>; diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi index d71fe2a..1604425 100644 --- a/arch/arm/boot/dts/spear1340.dtsi +++ b/arch/arm/boot/dts/spear1340.dtsi @@ -17,6 +17,20 @@ compatible = "st,spear1340"; ahb { + + spics: spics@e0700000{ + compatible = "st,spear-spics-gpio"; + reg = <0xe0700000 0x1000>; + st-spics,peripcfg-reg = <0x42c>; + st-spics,sw-enable-bit = <21>; + st-spics,cs-value-bit = <20>; + st-spics,cs-enable-mask = <3>; + st-spics,cs-enable-shift = <18>; + gpio-controller; + #gpio-cells = <2>; + status = "disabled"; + }; + ahci@b1000000 { compatible = "snps,spear-ahci"; reg = <0xb1000000 0x10000>;