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[73.241.114.122]) by smtp.gmail.com with ESMTPSA id f24sm3808567pjj.5.2021.01.20.20.06.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jan 2021 20:06:11 -0800 (PST) From: Richard Cochran To: netdev@vger.kernel.org Subject: [PATCH net 3/4] ARM: socfpga_defconfig: Disable PHY time stamping by default. Date: Wed, 20 Jan 2021 20:06:02 -0800 Message-Id: <5ba5eaabd8dd610fa6b269fc746fd98421fe22a0.1611198584.git.richardcochran@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210120_230614_565848_E4764DD6 X-CRM114-Status: GOOD ( 14.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Lunn , Florian Fainelli , Marc Zyngier , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Vivien Didelot , Dinh Nguyen , Russell King , Brandon Streiff , Olof Johansson , Jakub Kicinski , Vladimir Oltean , David Miller , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The NETWORK_PHY_TIMESTAMPING configuration option adds overhead into the networking stack. When enabled, all transmitted and received frames are subjected to extra tests to determine whether they just might be PTP frames to be presented to esoteric PHY time stamping drivers. However, no System on Chip, least ways not the socfpga SoC, includes such a PHY time stamping device. Disable the unneeded option by default. The diff includes a bit of extra churn caused by "make savedefconfig", but the generated defconfig is now in the canonical form. Signed-off-by: Richard Cochran --- arch/arm/configs/socfpga_defconfig | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig index e73c97b0f5b0..5bd433028285 100644 --- a/arch/arm/configs/socfpga_defconfig +++ b/arch/arm/configs/socfpga_defconfig @@ -14,8 +14,6 @@ CONFIG_ARM_THUMBEE=y CONFIG_SMP=y CONFIG_NR_CPUS=2 CONFIG_HIGHMEM=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_VFP=y CONFIG_NEON=y CONFIG_OPROFILE=y @@ -33,7 +31,6 @@ CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_BOOTP=y CONFIG_IP_PNP_RARP=y -CONFIG_NETWORK_PHY_TIMESTAMPING=y CONFIG_VLAN_8021Q=y CONFIG_VLAN_8021Q_GVRP=y CONFIG_CAN=y @@ -48,12 +45,10 @@ CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_MTD=y CONFIG_MTD_BLOCK=y -CONFIG_MTD_M25P80=y CONFIG_MTD_RAW_NAND=y CONFIG_MTD_NAND_DENALI_DT=y CONFIG_MTD_SPI_NOR=y # CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set -CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_OF_OVERLAY=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y @@ -89,6 +84,7 @@ CONFIG_I2C=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_DESIGNWARE_PLATFORM=y CONFIG_SPI=y +CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_SPI_DESIGNWARE=y CONFIG_SPI_DW_MMIO=y CONFIG_SPI_SPIDEV=y