Message ID | 5d3777fdf91d114effe1921255a7ad71ef30d277.1683034376.git.michal.simek@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64: zynqmp: Misc zynqmp changes | expand |
On 5/2/23 15:35, Michal Simek wrote: > There are couple of IPs which are enabled in origin HW design which are > missing in SOM dt. Add them to match default setup. > > Signed-off-by: Michal Simek <michal.simek@amd.com> > --- > > .../boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 95 +++++++++++++++++++ > 1 file changed, 95 insertions(+) > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts > index dcc17e3ea961..3862168fa026 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts > @@ -288,6 +288,101 @@ &gpio { > "", "", "", ""; /* 170 - 173 */ > }; > > +&zynqmp_dpsub { > + status = "okay"; > +}; > + > +&rtc { > + status = "okay"; > +}; > + > +&lpd_dma_chan1 { > + status = "okay"; > +}; > + > +&lpd_dma_chan2 { > + status = "okay"; > +}; > + > +&lpd_dma_chan3 { > + status = "okay"; > +}; > + > +&lpd_dma_chan4 { > + status = "okay"; > +}; > + > +&lpd_dma_chan5 { > + status = "okay"; > +}; > + > +&lpd_dma_chan6 { > + status = "okay"; > +}; > + > +&lpd_dma_chan7 { > + status = "okay"; > +}; > + > +&lpd_dma_chan8 { > + status = "okay"; > +}; > + > +&fpd_dma_chan1 { > + status = "okay"; > +}; > + > +&fpd_dma_chan2 { > + status = "okay"; > +}; > + > +&fpd_dma_chan3 { > + status = "okay"; > +}; > + > +&fpd_dma_chan4 { > + status = "okay"; > +}; > + > +&fpd_dma_chan5 { > + status = "okay"; > +}; > + > +&fpd_dma_chan6 { > + status = "okay"; > +}; > + > +&fpd_dma_chan7 { > + status = "okay"; > +}; > + > +&fpd_dma_chan8 { > + status = "okay"; > +}; > + > &gpu { > status = "okay"; > }; > + > +&lpd_watchdog { > + status = "okay"; > +}; > + > +&watchdog0 { > + status = "okay"; > +}; > + > +&cpu_opp_table { > + opp00 { > + opp-hz = /bits/ 64 <1333333333>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <666666666>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <444444444>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <333333333>; > + }; > +}; Applied. M
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts index dcc17e3ea961..3862168fa026 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts @@ -288,6 +288,101 @@ &gpio { "", "", "", ""; /* 170 - 173 */ }; +&zynqmp_dpsub { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&lpd_dma_chan1 { + status = "okay"; +}; + +&lpd_dma_chan2 { + status = "okay"; +}; + +&lpd_dma_chan3 { + status = "okay"; +}; + +&lpd_dma_chan4 { + status = "okay"; +}; + +&lpd_dma_chan5 { + status = "okay"; +}; + +&lpd_dma_chan6 { + status = "okay"; +}; + +&lpd_dma_chan7 { + status = "okay"; +}; + +&lpd_dma_chan8 { + status = "okay"; +}; + +&fpd_dma_chan1 { + status = "okay"; +}; + +&fpd_dma_chan2 { + status = "okay"; +}; + +&fpd_dma_chan3 { + status = "okay"; +}; + +&fpd_dma_chan4 { + status = "okay"; +}; + +&fpd_dma_chan5 { + status = "okay"; +}; + +&fpd_dma_chan6 { + status = "okay"; +}; + +&fpd_dma_chan7 { + status = "okay"; +}; + +&fpd_dma_chan8 { + status = "okay"; +}; + &gpu { status = "okay"; }; + +&lpd_watchdog { + status = "okay"; +}; + +&watchdog0 { + status = "okay"; +}; + +&cpu_opp_table { + opp00 { + opp-hz = /bits/ 64 <1333333333>; + }; + opp01 { + opp-hz = /bits/ 64 <666666666>; + }; + opp02 { + opp-hz = /bits/ 64 <444444444>; + }; + opp03 { + opp-hz = /bits/ 64 <333333333>; + }; +};
There are couple of IPs which are enabled in origin HW design which are missing in SOM dt. Add them to match default setup. Signed-off-by: Michal Simek <michal.simek@amd.com> --- .../boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 95 +++++++++++++++++++ 1 file changed, 95 insertions(+)