From patchwork Tue Aug 5 12:43:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartlomiej Zolnierkiewicz X-Patchwork-Id: 4678841 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E1CB0C0338 for ; Tue, 5 Aug 2014 12:45:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7632D2012D for ; Tue, 5 Aug 2014 12:45:50 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 076FB20127 for ; Tue, 5 Aug 2014 12:45:47 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XEe5u-0007Q7-Qt; Tue, 05 Aug 2014 12:43:58 +0000 Received: from mailout3.samsung.com ([203.254.224.33]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XEe5r-0007JG-UM for linux-arm-kernel@lists.infradead.org; Tue, 05 Aug 2014 12:43:57 +0000 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N9U00HXR3CF8H00@mailout3.samsung.com> for linux-arm-kernel@lists.infradead.org; Tue, 05 Aug 2014 21:43:27 +0900 (KST) X-AuditID: cbfee61a-f79e46d00000134f-5d-53e0d16f9ea4 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id D0.CC.04943.F61D0E35; Tue, 05 Aug 2014 21:43:27 +0900 (KST) Received: from amdc1032.localnet ([106.116.147.136]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N9U00IGY3CDFW30@mmp2.samsung.com>; Tue, 05 Aug 2014 21:43:27 +0900 (KST) From: Bartlomiej Zolnierkiewicz To: Kukjin Kim Subject: [PATCH v5][next-20140804] ARM: EXYNOS: Fix suspend/resume sequences Date: Tue, 05 Aug 2014 14:43:10 +0200 Message-id: <6342975.PHG2cX2jjn@amdc1032> User-Agent: KMail/4.8.4 (Linux/3.2.0-54-generic-pae; KDE/4.8.5; i686; ; ) MIME-version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrILMWRmVeSWpSXmKPExsVy+t9jQd38iw+CDV6081gc+7KFzeLvpGPs Fr0LrrJZbHp8jdXi8q45bBYzzu9jslh75C67xanrn9ks1s94zeLA6fH71yRGj02rOtk8Ni+p 97hyoonVo2/LKkaPz5vkAtiiuGxSUnMyy1KL9O0SuDK+zLzLXtBuX/FqXR9TA+Nyky5GTg4J AROJ002L2SFsMYkL99azgdhCAtMZJU7MLOli5AKyW5gkmqd0gyXYBKwkJravYgSxRQTUJHoW b2UEKWIW6GOSmDalCywhLOAj8XnRe9YuRg4OFgFVidPrpEHCvAKaEguubGcGsUUFPCV2bF/J BhEXlPgx+R4LiM0sIC+xb/9UVghbS2L9zuNMExj5ZiEpm4WkbBaSsgWMzKsYRVMLkguKk9Jz DfWKE3OLS/PS9ZLzczcxggP6mdQOxpUNFocYBTgYlXh4BdTuBwuxJpYVV+YeYpTgYFYS4Z1w /kGwEG9KYmVValF+fFFpTmrxIUZpDhYlcd4DrdaBQgLpiSWp2ampBalFMFkmDk6pBkbldIHc wCNv+h09ZYJfuC70nbEk69CxVNZlW6a9lKlynXd/pUD6ikt1sumNvbNs7boXclR757x0L/d2 UV598sbRaUUumvaXle8rljQe4u0QL/QzYA5Ne3cxqKPoRqbc3AkKDFa92qy9RZ81n1cHrJq9 xVe9KW2q5NptidUvjuhk6JbeUrrCp8RSnJFoqMVcVJwIAEYUrd9kAgAA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140805_054356_129341_CA8C00FA X-CRM114-Status: GOOD ( 19.48 ) X-Spam-Score: -5.7 (-----) Cc: linux-samsung-soc@vger.kernel.org, Arnd Bergmann , Tomasz Figa , linux-kernel@vger.kernel.org, arm@kernel.org, Olof Johansson , linux-arm-kernel@lists.infradead.org, Marek Szyprowski X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tomasz Figa Due to recent consolidation of Exynos suspend and cpuidle code, some parts of suspend and resume sequences are executed two times, once from exynos_pm_syscore_ops and then from exynos_cpu_pm_notifier() and thus it breaks suspend, at least on Exynos4-based boards. In addition, simple core power down from a cpuidle driver could, in case of CPU 0 could result in calling functions that are specific to suspend and deeper idle states. This patch fixes the issue by moving those operations outside the CPU PM notifier into suspend and AFTR code paths. This leads to a bit of code duplication, but allows additional code simplification, so in the end more code is removed than added. Fixes: 85f9f90808b4 ("ARM: EXYNOS: Use the cpu_pm notifier for pm") Cc: Kukjin Kim Cc: Arnd Bergmann Cc: Olof Johansson Cc: arm@kernel.org Signed-off-by: Tomasz Figa [b.zolnierkie: ported patch over current changes] [b.zolnierkie: fixed exynos_aftr_finisher() return value] Signed-off-by: Bartlomiej Zolnierkiewicz --- arch/arm/mach-exynos/pm.c | 163 ++++++++++++++++++--------------------- drivers/cpuidle/cpuidle-exynos.c | 25 ----- 2 files changed, 80 insertions(+), 108 deletions(-) v5: - use read_cpuid_part() instead of the deprecated read_cpuid_part_number() Index: b/arch/arm/mach-exynos/pm.c =================================================================== --- a/arch/arm/mach-exynos/pm.c 2014-08-05 14:14:29.605182233 +0200 +++ b/arch/arm/mach-exynos/pm.c 2014-08-05 14:30:41.713207901 +0200 @@ -114,26 +114,6 @@ static int exynos_irq_set_wake(struct ir #define S5P_CHECK_AFTR 0xFCBA0D10 #define S5P_CHECK_SLEEP 0x00000BAD -/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */ -static void exynos_set_wakeupmask(long mask) -{ - pmu_raw_writel(mask, S5P_WAKEUP_MASK); -} - -static void exynos_cpu_set_boot_vector(long flags) -{ - __raw_writel(virt_to_phys(exynos_cpu_resume), EXYNOS_BOOT_VECTOR_ADDR); - __raw_writel(flags, EXYNOS_BOOT_VECTOR_FLAG); -} - -void exynos_enter_aftr(void) -{ - exynos_set_wakeupmask(0x0000ff3e); - exynos_cpu_set_boot_vector(S5P_CHECK_AFTR); - /* Set value of power down register for aftr mode */ - exynos_sys_powerdown_conf(SYS_AFTR); -} - /* For Cortex-A9 Diagnostic and Power control register */ static unsigned int save_arm_register[2]; @@ -173,6 +153,82 @@ static void exynos_cpu_restore_register( : "cc"); } +static void exynos_pm_central_suspend(void) +{ + unsigned long tmp; + + /* Setting Central Sequence Register for power down mode */ + tmp = pmu_raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION); + tmp &= ~S5P_CENTRAL_LOWPWR_CFG; + pmu_raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); +} + +static int exynos_pm_central_resume(void) +{ + unsigned long tmp; + + /* + * If PMU failed while entering sleep mode, WFI will be + * ignored by PMU and then exiting cpu_do_idle(). + * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically + * in this situation. + */ + tmp = pmu_raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION); + if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) { + tmp |= S5P_CENTRAL_LOWPWR_CFG; + pmu_raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); + /* clear the wakeup state register */ + pmu_raw_writel(0x0, S5P_WAKEUP_STAT); + /* No need to perform below restore code */ + return -1; + } + + return 0; +} + +/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */ +static void exynos_set_wakeupmask(long mask) +{ + pmu_raw_writel(mask, S5P_WAKEUP_MASK); +} + +static void exynos_cpu_set_boot_vector(long flags) +{ + __raw_writel(virt_to_phys(exynos_cpu_resume), EXYNOS_BOOT_VECTOR_ADDR); + __raw_writel(flags, EXYNOS_BOOT_VECTOR_FLAG); +} + +static int exynos_aftr_finisher(unsigned long flags) +{ + exynos_set_wakeupmask(0x0000ff3e); + exynos_cpu_set_boot_vector(S5P_CHECK_AFTR); + /* Set value of power down register for aftr mode */ + exynos_sys_powerdown_conf(SYS_AFTR); + cpu_do_idle(); + + return 1; +} + +void exynos_enter_aftr(void) +{ + cpu_pm_enter(); + + exynos_pm_central_suspend(); + if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) + exynos_cpu_save_register(); + + cpu_suspend(0, exynos_aftr_finisher); + + if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) { + scu_enable(S5P_VA_SCU); + exynos_cpu_restore_register(); + } + + exynos_pm_central_resume(); + + cpu_pm_exit(); +} + static int exynos_cpu_suspend(unsigned long arg) { #ifdef CONFIG_CACHE_L2X0 @@ -217,16 +273,6 @@ static void exynos_pm_prepare(void) pmu_raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0); } -static void exynos_pm_central_suspend(void) -{ - unsigned long tmp; - - /* Setting Central Sequence Register for power down mode */ - tmp = pmu_raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION); - tmp &= ~S5P_CENTRAL_LOWPWR_CFG; - pmu_raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); -} - static int exynos_pm_suspend(void) { unsigned long tmp; @@ -244,29 +290,6 @@ static int exynos_pm_suspend(void) return 0; } -static int exynos_pm_central_resume(void) -{ - unsigned long tmp; - - /* - * If PMU failed while entering sleep mode, WFI will be - * ignored by PMU and then exiting cpu_do_idle(). - * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically - * in this situation. - */ - tmp = pmu_raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION); - if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) { - tmp |= S5P_CENTRAL_LOWPWR_CFG; - pmu_raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); - /* clear the wakeup state register */ - pmu_raw_writel(0x0, S5P_WAKEUP_STAT); - /* No need to perform below restore code */ - return -1; - } - - return 0; -} - static void exynos_pm_resume(void) { if (exynos_pm_central_resume()) @@ -369,44 +392,10 @@ static const struct platform_suspend_ops .valid = suspend_valid_only_mem, }; -static int exynos_cpu_pm_notifier(struct notifier_block *self, - unsigned long cmd, void *v) -{ - int cpu = smp_processor_id(); - - switch (cmd) { - case CPU_PM_ENTER: - if (cpu == 0) { - exynos_pm_central_suspend(); - if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) - exynos_cpu_save_register(); - } - break; - - case CPU_PM_EXIT: - if (cpu == 0) { - if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) { - scu_enable(S5P_VA_SCU); - exynos_cpu_restore_register(); - } - exynos_pm_central_resume(); - } - break; - } - - return NOTIFY_OK; -} - -static struct notifier_block exynos_cpu_pm_notifier_block = { - .notifier_call = exynos_cpu_pm_notifier, -}; - void __init exynos_pm_init(void) { u32 tmp; - cpu_pm_register_notifier(&exynos_cpu_pm_notifier_block); - /* Platform-specific GIC callback */ gic_arch_extn.irq_set_wake = exynos_irq_set_wake; Index: b/drivers/cpuidle/cpuidle-exynos.c =================================================================== --- a/drivers/cpuidle/cpuidle-exynos.c 2014-08-05 14:14:29.641182236 +0200 +++ b/drivers/cpuidle/cpuidle-exynos.c 2014-08-05 14:16:54.037186047 +0200 @@ -20,25 +20,6 @@ static void (*exynos_enter_aftr)(void); -static int idle_finisher(unsigned long flags) -{ - exynos_enter_aftr(); - cpu_do_idle(); - - return 1; -} - -static int exynos_enter_core0_aftr(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - cpu_pm_enter(); - cpu_suspend(0, idle_finisher); - cpu_pm_exit(); - - return index; -} - static int exynos_enter_lowpower(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) @@ -51,8 +32,10 @@ static int exynos_enter_lowpower(struct if (new_index == 0) return arm_cpuidle_simple_enter(dev, drv, new_index); - else - return exynos_enter_core0_aftr(dev, drv, new_index); + + exynos_enter_aftr(); + + return new_index; } static struct cpuidle_driver exynos_idle_driver = {