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[85.76.96.64]) by smtp.gmail.com with ESMTPSA id d4-v6sm160166ljg.44.2018.06.12.03.55.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 Jun 2018 03:55:29 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org Subject: [PATCH v2 2/5] dt: qcom: 8996: thermal: Move to DT initialisation Date: Tue, 12 Jun 2018 13:54:54 +0300 Message-Id: <683ceb9a7d283bcad47fc6e8e4fcfbd7e76c1018.1528799892.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180612_035542_606555_CA2FE412 X-CRM114-Status: GOOD ( 15.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , rnayak@codeaurora.org, "open list:THERMAL" , linux-arm-msm@vger.kernel.org, Will Deacon , bjorn.andersson@linaro.org, edubezval@gmail.com, David Brown , Rob Herring , Catalin Marinas , Andy Gross , Zhang Rui , "open list:ARM/QUALCOMM SUPPORT" , "moderated list:ARM64 PORT AARCH64 ARCHITECTURE" MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP We also split up the regmap address space into two, one for the TM registers, the other for the SROT registers. This was required to deal with different address offsets for the TM and SROT registers across different SoC families. Since tsens-common.c/init_common() currently only registers one address space, the order is important (TM before SROT).This is OK since the code doesn't really use the SROT functionality yet. Signed-off-by: Amit Kucheria --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 12 +++++++++++- drivers/thermal/qcom/tsens-8996.c | 1 - 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 410ae78..b4aab18 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -451,7 +451,17 @@ tsens0: thermal-sensor@4a8000 { compatible = "qcom,msm8996-tsens"; - reg = <0x4a8000 0x2000>; + reg = <0x4a9000 0x1000>, /* TM */ + <0x4a8000 0x1000>; /* SROT */ + #qcom,sensors = <13>; + #thermal-sensor-cells = <1>; + }; + + tsens1: thermal-sensor@4ac000 { + compatible = "qcom,msm8996-tsens"; + reg = <0x4ad000 0x1000>, /* TM */ + <0x4ac000 0x1000>; /* SROT */ + #qcom,sensors = <8>; #thermal-sensor-cells = <1>; }; diff --git a/drivers/thermal/qcom/tsens-8996.c b/drivers/thermal/qcom/tsens-8996.c index e1f7781..6e59078 100644 --- a/drivers/thermal/qcom/tsens-8996.c +++ b/drivers/thermal/qcom/tsens-8996.c @@ -79,6 +79,5 @@ static const struct tsens_ops ops_8996 = { }; const struct tsens_data data_8996 = { - .num_sensors = 13, .ops = &ops_8996, };