| Message ID | 6888a87af6ea47ea29d429b91a57cb146d1f69c8.1740009184.git.yepeilin@google.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Introduce load-acquire and store-release BPF instructions | expand |
On 2/20/2025 9:21 AM, Peilin Ye wrote: > We are planning to add load-acquire (LDAR{,B,H}) and store-release > (STLR{,B,H}) instructions to insn.{c,h}; add BIT(23) to mask of load_ex > and store_ex to prevent aarch64_insn_is_{load,store}_ex() from returning > false-positives for load-acquire and store-release instructions. > > Reference: Arm Architecture Reference Manual (ARM DDI 0487K.a, > ID032224), > > * C6.2.228 LDXR > * C6.2.165 LDAXR > * C6.2.161 LDAR > * C6.2.393 STXR > * C6.2.360 STLXR > * C6.2.353 STLR > > Signed-off-by: Peilin Ye <yepeilin@google.com> > --- > arch/arm64/include/asm/insn.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h > index e390c432f546..2d8316b3abaf 100644 > --- a/arch/arm64/include/asm/insn.h > +++ b/arch/arm64/include/asm/insn.h > @@ -351,8 +351,8 @@ __AARCH64_INSN_FUNCS(ldr_imm, 0x3FC00000, 0x39400000) > __AARCH64_INSN_FUNCS(ldr_lit, 0xBF000000, 0x18000000) > __AARCH64_INSN_FUNCS(ldrsw_lit, 0xFF000000, 0x98000000) > __AARCH64_INSN_FUNCS(exclusive, 0x3F800000, 0x08000000) > -__AARCH64_INSN_FUNCS(load_ex, 0x3F400000, 0x08400000) > -__AARCH64_INSN_FUNCS(store_ex, 0x3F400000, 0x08000000) > +__AARCH64_INSN_FUNCS(load_ex, 0x3FC00000, 0x08400000) > +__AARCH64_INSN_FUNCS(store_ex, 0x3FC00000, 0x08000000) > __AARCH64_INSN_FUNCS(mops, 0x3B200C00, 0x19000400) > __AARCH64_INSN_FUNCS(stp, 0x7FC00000, 0x29000000) > __AARCH64_INSN_FUNCS(ldp, 0x7FC00000, 0x29400000) Looks good to me Acked-by: Xu Kuohai <xukuohai@huawei.com>
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h index e390c432f546..2d8316b3abaf 100644 --- a/arch/arm64/include/asm/insn.h +++ b/arch/arm64/include/asm/insn.h @@ -351,8 +351,8 @@ __AARCH64_INSN_FUNCS(ldr_imm, 0x3FC00000, 0x39400000) __AARCH64_INSN_FUNCS(ldr_lit, 0xBF000000, 0x18000000) __AARCH64_INSN_FUNCS(ldrsw_lit, 0xFF000000, 0x98000000) __AARCH64_INSN_FUNCS(exclusive, 0x3F800000, 0x08000000) -__AARCH64_INSN_FUNCS(load_ex, 0x3F400000, 0x08400000) -__AARCH64_INSN_FUNCS(store_ex, 0x3F400000, 0x08000000) +__AARCH64_INSN_FUNCS(load_ex, 0x3FC00000, 0x08400000) +__AARCH64_INSN_FUNCS(store_ex, 0x3FC00000, 0x08000000) __AARCH64_INSN_FUNCS(mops, 0x3B200C00, 0x19000400) __AARCH64_INSN_FUNCS(stp, 0x7FC00000, 0x29000000) __AARCH64_INSN_FUNCS(ldp, 0x7FC00000, 0x29400000)
We are planning to add load-acquire (LDAR{,B,H}) and store-release (STLR{,B,H}) instructions to insn.{c,h}; add BIT(23) to mask of load_ex and store_ex to prevent aarch64_insn_is_{load,store}_ex() from returning false-positives for load-acquire and store-release instructions. Reference: Arm Architecture Reference Manual (ARM DDI 0487K.a, ID032224), * C6.2.228 LDXR * C6.2.165 LDAXR * C6.2.161 LDAR * C6.2.393 STXR * C6.2.360 STLXR * C6.2.353 STLR Signed-off-by: Peilin Ye <yepeilin@google.com> --- arch/arm64/include/asm/insn.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)