From patchwork Mon Jun 10 12:31:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 2697351 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id 7340DDF264 for ; Mon, 10 Jun 2013 12:33:09 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Um1H6-0005Q9-4m; Mon, 10 Jun 2013 12:32:40 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Um1Gn-0001Ly-UU; Mon, 10 Jun 2013 12:32:21 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Um1Gl-0001Kp-7N for linux-arm-kernel@lists.infradead.org; Mon, 10 Jun 2013 12:32:20 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r5ACVtvs015017; Mon, 10 Jun 2013 07:31:55 -0500 Received: from DNCE71.ent.ti.com (dnce71.ent.ti.com [137.167.131.20]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r5ACVsZG015952; Mon, 10 Jun 2013 07:31:54 -0500 Received: from DNCE05.ent.ti.com ([fe80::5dc0:6ff5:718e:785a]) by DNCE71.ent.ti.com ([fe80::7d60:3983:a688:ea7d%20]) with mapi id 14.02.0342.003; Mon, 10 Jun 2013 14:31:54 +0200 From: "Quadros, Roger" To: Tony Lindgren , "linus.walleij@linaro.org" Subject: RE: [PATCH 4/4] ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap Thread-Topic: [PATCH 4/4] ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap Thread-Index: AQHOY8CyEKkPaGnDUUin8leVNXChb5ku5BlV Date: Mon, 10 Jun 2013 12:31:54 +0000 Message-ID: <688FBEF7C8277944BE5AED9A41FB1EBC1AB12DA0@DNCE05.ent.ti.com> References: <20130607203936.16513.57494.stgit@localhost>, <20130607205046.16513.2802.stgit@localhost> In-Reply-To: <20130607205046.16513.2802.stgit@localhost> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [157.170.170.49] x-exclaimer-md-config: f9c360f5-3d1e-4c3c-8703-f45bf52eff6b MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130610_083219_387638_C21B01CA X-CRM114-Status: GOOD ( 21.04 ) X-Spam-Score: -7.0 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.41 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.1 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: "Ujfalusi, Peter" , "devicetree-discuss@lists.ozlabs.org" , "linux-omap@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Haojian Zhuang X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Hi Tony, (sorry, on Outlook web) - compatible = "ti,omap4-padconf", "pinctrl-single"; + compatible = "ti,omap4-padconf"; This change is not necessary if we make sure the pinctrl-single-omap driver gets registered early enough, before the pinctrl devices are probed. (e.g. subsys_initcall()) I've commented about this in the other patch. cheers, -roger Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 99ba6e1..847af56 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -94,7 +94,7 @@ }; omap3_pmx_core: pinmux@48002030 { - compatible = "ti,omap3-padconf", "pinctrl-single"; + compatible = "ti,omap3-padconf"; reg = <0x48002030 0x05cc>; #address-cells = <1>; #size-cells = <0>; @@ -103,7 +103,7 @@ }; omap3_pmx_wkup: pinmux@0x48002a00 { - compatible = "ti,omap3-padconf", "pinctrl-single"; + compatible = "ti,omap3-padconf"; reg = <0x48002a00 0x5c>; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 2a56428..2a4f099 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -107,7 +107,7 @@ }; omap4_pmx_core: pinmux@4a100040 { - compatible = "ti,omap4-padconf", "pinctrl-single"; + compatible = "ti,omap4-padconf"; reg = <0x4a100040 0x0196>; #address-cells = <1>; #size-cells = <0>; @@ -115,7 +115,7 @@ pinctrl-single,function-mask = <0x7fff>; }; omap4_pmx_wkup: pinmux@4a31e040 { - compatible = "ti,omap4-padconf", "pinctrl-single"; + compatible = "ti,omap4-padconf"; reg = <0x4a31e040 0x0038>; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 3dd7ff8..5515d58 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -100,7 +100,7 @@ }; omap5_pmx_core: pinmux@4a002840 { - compatible = "ti,omap4-padconf", "pinctrl-single"; + compatible = "ti,omap4-padconf"; reg = <0x4a002840 0x01b6>; #address-cells = <1>; #size-cells = <0>; @@ -108,7 +108,7 @@ pinctrl-single,function-mask = <0x7fff>; }; omap5_pmx_wkup: pinmux@4ae0c840 { - compatible = "ti,omap4-padconf", "pinctrl-single"; + compatible = "ti,omap4-padconf"; reg = <0x4ae0c840 0x0038>; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index f82cf87..48094b58 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -811,6 +811,12 @@ int __init omap_mux_late_init(void) } } + omap_mux_dbg_init(); + + /* see pinctrl-single-omap for the wake-up interrupt handling */ + if (of_have_populated_dt()) + return 0; + ret = request_irq(omap_prcm_event_to_irq("io"), omap_hwmod_mux_handle_irq, IRQF_SHARED | IRQF_NO_SUSPEND, "hwmod_io", omap_mux_late_init); @@ -818,8 +824,6 @@ int __init omap_mux_late_init(void) if (ret) pr_warning("mux: Failed to setup hwmod io irq %d\n", ret); - omap_mux_dbg_init(); - return 0; } diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index c018593..9b19b14 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -172,6 +172,8 @@ static int prcm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits) wkst = omap2_prm_read_mod_reg(module, wkst_off); wkst &= ~ignore_bits; c++; + if (c > 10) + break; } omap2_cm_write_mod_reg(iclk, module, iclk_off); omap2_cm_write_mod_reg(fclk, module, fclk_off); diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 228b850..b9af6a7 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -22,8 +22,10 @@ #include #include #include +#include #include +#include "soc.h" #include "prm2xxx_3xxx.h" #include "prm2xxx.h" #include "prm3xxx.h" @@ -95,6 +97,7 @@ static void omap_prcm_irq_handler(unsigned int irq, struct irq_desc *desc) struct irq_chip *chip = irq_desc_get_chip(desc); unsigned int virtirq; int nr_irq = prcm_irq_setup->nr_regs * 32; + int retries = 20; /* * If we are suspended, mask all interrupts from PRCM level, @@ -136,6 +139,9 @@ static void omap_prcm_irq_handler(unsigned int irq, struct irq_desc *desc) /* Serve normal events next */ for_each_set_bit(virtirq, pending, nr_irq) generic_handle_irq(prcm_irq_setup->base_irq + virtirq); + + if (retries-- < 1) + break; } if (chip->irq_ack) chip->irq_ack(&desc->irq_data); @@ -234,6 +240,15 @@ void omap_prcm_irq_complete(void) prcm_irq_setup->restore_irqen(prcm_irq_setup->saved_mask); } +static struct pcs_omap_pdata pcs_pdata; + +static struct platform_device pinctrl_single_omap = { + .name = "pinctrl-single-omap-soc", + .dev = { + .platform_data = &pcs_pdata, + }, +}; + /** * omap_prcm_register_chain_handler - initializes the prcm chained interrupt * handler based on provided parameters @@ -322,6 +337,17 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup) prcm_irq_chips[i] = gc; } + if (of_have_populated_dt()) { + pcs_pdata.irq = omap_prcm_event_to_irq("io"); + if (cpu_is_omap34xx()) + pcs_pdata.reconfigure_io_chain = + omap3xxx_prm_reconfigure_io_chain; + else + pcs_pdata.reconfigure_io_chain = + omap44xx_prm_reconfigure_io_chain; + platform_device_register(&pinctrl_single_omap); + } + return 0; err: