| Message ID | 69670e5a46c98a2eb73d4f2e2d571a27c46b4640.1700722941.git.michal.simek@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v4,1/2] dt-bindings: soc: xilinx: Move xilinx.yaml from arm to soc | expand |
On 11/23/23 08:02, Michal Simek wrote: > MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. > It is hardware compatible with classic MicroBlaze processor. Processor can > be used with standard AMD/Xilinx IPs including interrupt controller and > timer. > > Signed-off-by: Michal Simek <michal.simek@amd.com> > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > > Changes in v4: > - Fix indentation reported by bot > > Changes in v3: > - Add Krzysztof's ACK > > Changes in v2: > - Put MicroBlaze V description to xilinx.yaml > - Add qemu target platform as platform used for testing. > > Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml > index 95758deca325..d4c0fe1fe435 100644 > --- a/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml > +++ b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml > @@ -132,6 +132,11 @@ properties: > - const: xlnx,zynqmp-smk-k26 > - const: xlnx,zynqmp > > + - description: AMD MicroBlaze V (QEMU) > + items: > + - const: qemu,mbv > + - const: amd,mbv > + > additionalProperties: true > > ... Applied. M
diff --git a/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml index 95758deca325..d4c0fe1fe435 100644 --- a/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml +++ b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml @@ -132,6 +132,11 @@ properties: - const: xlnx,zynqmp-smk-k26 - const: xlnx,zynqmp + - description: AMD MicroBlaze V (QEMU) + items: + - const: qemu,mbv + - const: amd,mbv + additionalProperties: true ...