From patchwork Thu Feb 17 14:24:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robin Murphy X-Patchwork-Id: 12750276 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 61D21C433F5 for ; Thu, 17 Feb 2022 14:34:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4IyDoN5gmdmOnXMKfEH+WnuhiR7gwMdv6U9bCn0LwUc=; b=jbpWrHy1K7Ti7A Xu53kc0LNBYs6m+3KqMaVXckTEv8jqPePY4NigV9cwDXKksJvlXcWFYObsDq9lUAKXVG0ZJ9X2+ed hYms/J5Is60IoN1Xe6+c51vp2+5a7SBfQcADUdNsKQKZp0tzKk+38ZYPM1KgUC4tlJO6L1Oodh0eh c0ktWrn/HoZUIJITKdDxmCFvE/8pbPfEViXnBWCs8/LExYgoTAOJZQvGoqV8sHZnudE/zXOn+vx2q m7PiUvnvEUceMEmzx+l18cLzOsjhKG9sgpOTcCEVo3u5smmCsCtd+R9cmjw/pjGvL7U3PxS9ZVERI 1U4hKXQ/6Jl1NFfZZMWg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nKhpd-00B2Tn-Vu; Thu, 17 Feb 2022 14:32:30 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nKhhv-00AzS2-Us for linux-arm-kernel@lists.infradead.org; Thu, 17 Feb 2022 14:24:33 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 15D2212FC; Thu, 17 Feb 2022 06:24:31 -0800 (PST) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id EC39D3F718; Thu, 17 Feb 2022 06:24:29 -0800 (PST) From: Robin Murphy To: will@kernel.org, mark.rutland@arm.com Cc: lorenzo.pieralisi@arm.com, sudeep.holla@arm.com, linux-arm-kernel@lists.infradead.org, jean-philippe@linaro.org, leo.yan@linaro.org, noda.akio@socionext.com Subject: [PATCH 2/6] acpi/iort: Register SMMUv2 PMU interrupts Date: Thu, 17 Feb 2022 14:24:16 +0000 Message-Id: <6e72111454a261be938b97a529294ef92b9408d0.1645106346.git.robin.murphy@arm.com> X-Mailer: git-send-email 2.28.0.dirty In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220217_062432_107206_A85DEB9B X-CRM114-Status: GOOD ( 14.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In preparation for SMMUv2 PMU support, make sure the PMU IRQs are parsed out of IORT and registered somewhere the SMMU driver can find them. Without making massively invasive changes there aren't many ways to achieve this; inserting them into the SMMU's resource list between the global and context IRQs is easy enough to cope with in the driver, and offers the path of least resistance for the DT binding too. Signed-off-by: Robin Murphy --- drivers/acpi/arm64/iort.c | 18 ++++++++++++++---- drivers/iommu/arm/arm-smmu/arm-smmu.c | 2 +- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index 3b23fb775ac4..175397913be1 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -1277,10 +1277,10 @@ static int __init arm_smmu_count_resources(struct acpi_iort_node *node) * configuration access interrupt. * * MMIO address and global fault interrupt resources are always - * present so add them to the context interrupt count as a static - * value. + * present so add them to the context + PMU interrupt count as a + * static value. */ - return smmu->context_interrupt_count + 2; + return smmu->pmu_interrupt_count + smmu->context_interrupt_count + 2; } static void __init arm_smmu_init_resources(struct resource *res, @@ -1288,7 +1288,7 @@ static void __init arm_smmu_init_resources(struct resource *res, { struct acpi_iort_smmu *smmu; int i, hw_irq, trigger, num_res = 0; - u64 *ctx_irq, *glb_irq; + u64 *ctx_irq, *glb_irq, *pmu_irq; /* Retrieve SMMU specific data */ smmu = (struct acpi_iort_smmu *)node->node_data; @@ -1306,6 +1306,16 @@ static void __init arm_smmu_init_resources(struct resource *res, acpi_iort_register_irq(hw_irq, "arm-smmu-global", trigger, &res[num_res++]); + /* PMU IRQs */ + pmu_irq = ACPI_ADD_PTR(u64, node, smmu->pmu_interrupt_offset); + for (i = 0; i < smmu->pmu_interrupt_count; i++) { + hw_irq = IORT_IRQ_MASK(pmu_irq[i]); + trigger = IORT_IRQ_TRIGGER_MASK(pmu_irq[i]); + + acpi_iort_register_irq(hw_irq, "arm-smmu-pmu", trigger, + &res[num_res++]); + } + /* Context IRQs */ ctx_irq = ACPI_ADD_PTR(u64, node, smmu->context_interrupt_offset); for (i = 0; i < smmu->context_interrupt_count; i++) { diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index e50fcf37af58..cbfe4cc914f0 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -1969,7 +1969,7 @@ static int arm_smmu_device_acpi_probe(struct arm_smmu_device *smmu, /* Ignore the configuration access interrupt */ *global_irqs = 1; - *pmu_irqs = 0; + *pmu_irqs = iort_smmu->pmu_interrupt_count; if (iort_smmu->flags & ACPI_IORT_SMMU_COHERENT_WALK) smmu->features |= ARM_SMMU_FEAT_COHERENT_WALK;