From patchwork Mon Mar 20 16:30:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13181577 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 32867C7618A for ; Mon, 20 Mar 2023 16:31:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=8rha9zIzY9gj5X+psh4SjfTjdDr4qT1JGDOAB1/NGok=; b=vgsybwGRAhGxgb HsF8L8etUz3U29AN5wEHRvVYJxdhCdVTu5KsCi9pgK9GBeHStnk618i3yBr7IW6CrteNZz37fpHzh cbRXUbzlofC7CK2buOeokP9tr1xoV5TxHcKLyj2P7aIoKjUgdzCOvqs58mpifmmS7pCmoabBWNl21 6NbOEYkwThiEwWF5cpdk0kbN0LOqFrsWY2AXd1jFlknZTDc/0wNwPNuOvEe13aVaCJTN/y5NNKX5i 5CdFGCNZtRkSTCJ8SbuZY9cbLjhYBF/iNlKa6Eklv+S6LGJysKCOSQq/+32VnCC9PTj9nlLW6AVSn Lwd0FlYBlUtRMgAAsorg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1peIPA-009mRH-2W; Mon, 20 Mar 2023 16:30:40 +0000 Received: from albert.telenet-ops.be ([2a02:1800:110:4::f00:1a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1peIOz-009mIz-0F for linux-arm-kernel@lists.infradead.org; Mon, 20 Mar 2023 16:30:32 +0000 Received: from ramsan.of.borg ([84.195.187.55]) by albert.telenet-ops.be with bizsmtp id agWC2901D1C8whw06gWCwr; Mon, 20 Mar 2023 17:30:12 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1peIO3-00E2uz-P5; Mon, 20 Mar 2023 17:30:12 +0100 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1peIOi-007SSt-JE; Mon, 20 Mar 2023 17:30:12 +0100 From: Geert Uytterhoeven To: Magnus Damm , Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH 2/2] ARM: dts: r8a7779: Add PWM support Date: Mon, 20 Mar 2023 17:30:06 +0100 Message-Id: <71622584db692f571d542ef2dcf088ce549aed3f.1679329211.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230320_093029_258744_34DFC8D5 X-CRM114-Status: GOOD ( 10.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for the 7 PWM channels provided by PWM Timers on R-Car H1, by describing the PWM Timers and their module clock. Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7779.dtsi | 91 +++++++++++++++++++++++++++++----- 1 file changed, 78 insertions(+), 13 deletions(-) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 39fc58f32df61b9a..97b767d81d926049 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -324,6 +324,69 @@ hscif1: serial@ffe49000 { status = "disabled"; }; + pwm0: pwm@ffe50000 { + compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar"; + reg = <0xffe50000 0x8>; + clocks = <&mstp0_clks R8A7779_CLK_PWM>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm1: pwm@ffe51000 { + compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar"; + reg = <0xffe51000 0x8>; + clocks = <&mstp0_clks R8A7779_CLK_PWM>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm2: pwm@ffe52000 { + compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar"; + reg = <0xffe52000 0x8>; + clocks = <&mstp0_clks R8A7779_CLK_PWM>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm3: pwm@ffe53000 { + compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar"; + reg = <0xffe53000 0x8>; + clocks = <&mstp0_clks R8A7779_CLK_PWM>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm4: pwm@ffe54000 { + compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar"; + reg = <0xffe54000 0x8>; + clocks = <&mstp0_clks R8A7779_CLK_PWM>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm5: pwm@ffe55000 { + compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar"; + reg = <0xffe55000 0x8>; + clocks = <&mstp0_clks R8A7779_CLK_PWM>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm6: pwm@ffe56000 { + compatible = "renesas,pwm-r8a7779", "renesas,pwm-rcar"; + reg = <0xffe56000 0x8>; + clocks = <&mstp0_clks R8A7779_CLK_PWM>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; + #pwm-cells = <2>; + status = "disabled"; + }; + pfc: pinctrl@fffc0000 { compatible = "renesas,pfc-r8a7779"; reg = <0xfffc0000 0x23c>; @@ -554,7 +617,8 @@ mstp0_clks: clocks@ffc80030 { compatible = "renesas,r8a7779-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0xffc80030 4>; - clocks = <&cpg_clocks R8A7779_CLK_S>, + clocks = <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_S>, <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_P>, @@ -572,20 +636,21 @@ mstp0_clks: clocks@ffc80030 { <&cpg_clocks R8A7779_CLK_P>; #clock-cells = <1>; clock-indices = < - R8A7779_CLK_HSPI R8A7779_CLK_TMU2 - R8A7779_CLK_TMU1 R8A7779_CLK_TMU0 - R8A7779_CLK_HSCIF1 R8A7779_CLK_HSCIF0 - R8A7779_CLK_SCIF5 R8A7779_CLK_SCIF4 - R8A7779_CLK_SCIF3 R8A7779_CLK_SCIF2 - R8A7779_CLK_SCIF1 R8A7779_CLK_SCIF0 - R8A7779_CLK_I2C3 R8A7779_CLK_I2C2 - R8A7779_CLK_I2C1 R8A7779_CLK_I2C0 + R8A7779_CLK_PWM R8A7779_CLK_HSPI + R8A7779_CLK_TMU2 R8A7779_CLK_TMU1 + R8A7779_CLK_TMU0 R8A7779_CLK_HSCIF1 + R8A7779_CLK_HSCIF0 R8A7779_CLK_SCIF5 + R8A7779_CLK_SCIF4 R8A7779_CLK_SCIF3 + R8A7779_CLK_SCIF2 R8A7779_CLK_SCIF1 + R8A7779_CLK_SCIF0 R8A7779_CLK_I2C3 + R8A7779_CLK_I2C2 R8A7779_CLK_I2C1 + R8A7779_CLK_I2C0 >; clock-output-names = - "hspi", "tmu2", "tmu1", "tmu0", "hscif1", - "hscif0", "scif5", "scif4", "scif3", "scif2", - "scif1", "scif0", "i2c3", "i2c2", "i2c1", - "i2c0"; + "pwm", "hspi", "tmu2", "tmu1", "tmu0", + "hscif1", "hscif0", "scif5", "scif4", "scif3", + "scif2", "scif1", "scif0", "i2c3", "i2c2", + "i2c1", "i2c0"; }; mstp1_clks: clocks@ffc80034 { compatible = "renesas,r8a7779-mstp-clocks",