diff mbox

[RFT] mtd: ixp4xx: Unrequire CONFIG_MTD_CFI_BE_BYTE_SWAP

Message ID 719460394.273364.1411492720358.JavaMail.zimbra@xes-inc.com (mailing list archive)
State New, archived
Headers show

Commit Message

Aaron Sierra Sept. 23, 2014, 5:18 p.m. UTC
The .swap member of the map_info structure is provided for situations
where a mapping must always be big or little-endian regardless of the
endianness of the system performing the access.

Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
---
 drivers/mtd/maps/ixp4xx.c | 31 +++++++------------------------
 1 file changed, 7 insertions(+), 24 deletions(-)

Comments

Arnd Bergmann Sept. 23, 2014, 6:13 p.m. UTC | #1
On Tuesday 23 September 2014 12:18:40 Aaron Sierra wrote:
> -#ifndef __ARMEB__
> -#ifndef CONFIG_MTD_CFI_BE_BYTE_SWAP
> -#  error CONFIG_MTD_CFI_BE_BYTE_SWAP required
> -#endif
>  
>  static inline u16 flash_read16(void __iomem *addr)
>  {
> -       return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2)));
> +       return be16_to_cpu(__raw_readw(addr));
>  }
>  
>  static inline void flash_write16(u16 d, void __iomem *addr)
>  {
> -       __raw_writew(cpu_to_be16(d), (void __iomem *)((unsigned long)addr ^ 0x2));
> +       __raw_writew(cpu_to_be16(d), addr);
>  }
>  
>  #define        BYTE0(h)        ((h) & 0xFF)
>  #define        BYTE1(h)        (((h) >> 8) & 0xFF)
> 

Your patch looks like a good idea, but I think the above is still wrong
because you no longer fix up the address to swap the 16-bit halves of
a 32-bit word.

My guess is that you can just do 

static inline u16 flash_read16(void __iomem *addr)
{
	if (!IS_ENABLED(CPU_BIG_ENDIAN))
		addr = (void __iomem *)((unsigned long)addr ^ 0x2));

        return readl_relaxed(addr);
}

static inline void flash_write16(u16 d, void __iomem *addr)
{
	if (!IS_ENABLED(CPU_BIG_ENDIAN))
		addr = (void __iomem *)((unsigned long)addr ^ 0x2));

        writel_relaxed(d, addr);
}

to do this.

	Arnd
diff mbox

Patch

diff --git a/drivers/mtd/maps/ixp4xx.c b/drivers/mtd/maps/ixp4xx.c
index 6a589f1..decaefe 100644
--- a/drivers/mtd/maps/ixp4xx.c
+++ b/drivers/mtd/maps/ixp4xx.c
@@ -26,6 +26,7 @@ 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/map.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/cfi_endian.h>
 
 #include <asm/io.h>
 #include <asm/mach/flash.h>
@@ -48,43 +49,24 @@ 
  *     | C | D | 2
  *     +---+---+
  * This means that on LE systems each 16 bit word must be swapped. Note that
- * this requires CONFIG_MTD_CFI_BE_BYTE_SWAP to be enabled to 'unswap' the CFI
- * data and other flash commands which are always in D7-D0.
+ * this is accounted for by defining map_info.swap to be CFI_BIG_ENDIAN to
+ * 'unswap' the CFI commands and using cpu_to_be16/be16_to_cpu to 'unswap'
+ * the data.
  */
-#ifndef __ARMEB__
-#ifndef CONFIG_MTD_CFI_BE_BYTE_SWAP
-#  error CONFIG_MTD_CFI_BE_BYTE_SWAP required
-#endif
 
 static inline u16 flash_read16(void __iomem *addr)
 {
-	return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2)));
+	return be16_to_cpu(__raw_readw(addr));
 }
 
 static inline void flash_write16(u16 d, void __iomem *addr)
 {
-	__raw_writew(cpu_to_be16(d), (void __iomem *)((unsigned long)addr ^ 0x2));
+	__raw_writew(cpu_to_be16(d), addr);
 }
 
 #define	BYTE0(h)	((h) & 0xFF)
 #define	BYTE1(h)	(((h) >> 8) & 0xFF)
 
-#else
-
-static inline u16 flash_read16(const void __iomem *addr)
-{
-	return __raw_readw(addr);
-}
-
-static inline void flash_write16(u16 d, void __iomem *addr)
-{
-	__raw_writew(d, addr);
-}
-
-#define	BYTE0(h)	(((h) >> 8) & 0xFF)
-#define	BYTE1(h)	((h) & 0xFF)
-#endif
-
 static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
 {
 	map_word val;
@@ -200,6 +182,7 @@  static int ixp4xx_flash_probe(struct platform_device *dev)
 	 * Tell the MTD layer we're not 1:1 mapped so that it does
 	 * not attempt to do a direct access on us.
 	 */
+	info->map.swap = CFI_BIG_ENDIAN;
 	info->map.phys = NO_XIP;
 	info->map.size = resource_size(dev->resource);