Message ID | 72b64db0a3ae682d1c6f435fecf7876de2f57bc3.1556644355.git.agx@sigxcpu.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2] arm64: dts: imx8mq: Add a node for irqsteer | expand |
On Tue, Apr 30, 2019 at 07:15:55PM +0200, Guido Günther wrote: > Add a node for the irqsteer interrupt controller found on the iMX8MQ > SoC. > > Signed-off-by: Guido Günther <agx@sigxcpu.org> > Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Applied, thanks.
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 2cc939cfbd75..311f536d3bbf 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -798,6 +798,25 @@ }; }; + bus@32c00000 { /* AIPS4 */ + compatible = "fsl,imx8mq-aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x32c00000 0x32c00000 0x400000>; + + irqsteer: interrupt-controller@32e2d000 { + compatible = "fsl,imx8m-irqsteer", "fsl,imx-irqsteer"; + reg = <0x32e2d000 0x1000>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>; + clock-names = "ipg"; + fsl,channel = <0>; + fsl,num-irqs = <64>; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + gpu: gpu@38000000 { compatible = "vivante,gc"; reg = <0x38000000 0x40000>;