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Mon, 14 Apr 2025 21:58:20 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , Subject: [PATCH v2 10/11] iommu/arm-smmu-v3: Decouple vmid from S2 nest_parent domain Date: Mon, 14 Apr 2025 21:57:45 -0700 Message-ID: <74495f4edb0d80dff17cf0ab9fe13c29f55b7502.1744692494.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00029927:EE_|SN7PR12MB8817:EE_ X-MS-Office365-Filtering-Correlation-Id: 68572d6e-6665-4165-c15d-08dd7bda2f6c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|7416014|1800799024|36860700013; X-Microsoft-Antispam-Message-Info: bLg0i1QnmpCqVUakPXvuKukKbZnIe9sUEzp605Rc65lXNS0wfTrJdSutBmKa5GoUpirwfEm5G2MlfCKx40BToFYkfsWDrD+7Oo8dnrjrKL6u90UiMGIywAv7Wuv+wekVSvo3IZmC8H0shmng3QhP+uhH1st+IaQcxnasZcggIrr6B7oLdJ6UOF2e8pTKMC9/ZNgcXjVOIpW2YE7KN/oc2mwN4xuFYpZUL6dXpMDzVJD3eKavNGa0puJ+A2Lqv3L5cCcz1FtrHejh7aMK2BdrY50V8zUK4OL6wi8jzXp7hgXJX4WNpNbQYx9qEwXz4uO+iT9SB1TmplFt/vH6/KgXQcbxybluvixvHK4m4mvh6cmqdvuJtvMgE5Z5lZSkXB7z7EZ6R97Va3Q97zt5DuMd4Co51ikJ4P9I6xfBzYQwio3p3cyicST+UskmzBw+pL6NVaUiG7krasHIJlLpl3v0a7stLBUx9VxkHTRGMWYMQbkQFmJrrCHGF7BtjlG35XGQQ3Jcrhi0u+1IloxtwKak8nPE8BamJjkJBO0Di43wmRoH9DLW+Szm3WqilZRD+PCPxMmcWsCEFwDrccItdHoECarj8ohYsJQykALWuLRUi3VCAWFlaus9huROl8OZ13S6XEXgCaZMSgC/Y9EZRpo9oqK118b/mICGsqgVkgDe+KB3HjSs2syTxGDmawN8aIH7b6DI48fwnC9lQEDH9xdXxz+L1KExecG6mW+TYU1y1kSHoSPJDnbyVJ+cRnJpS5+8VURRGRfCeE8uIFhFQHuXOZKjckWWay3wX5j+WOantHHpHiocTkNuWZQQmEVtze6lGK5MFV7vC7w5y6clS6YW+0SiH8WWj1I3c9gRosjjr5djzcjhYnewqEt02Dg2Y1yBwVnGNaocNMTsTdA1cwp5APWSeaJqn8HycsMJ/d2Fj1cuk38z9sOW2+iCawFvH41Kgspgw9XIEyEupmt66Erp//Dng3j/qW4xvIaudJaTonNZQxmrF9DtZRLBoDF6mrUTBX82AHZVyCKnz4jnmZtNjb2P0UUAzxJKqPImkDc6TysMM2pENX+j541oRxI8nJLWS1RIrwrN6bygV3EAgz+T8j7n0Xd7Qla0F//egpP5S8m+A6yeX4oxj7/ReUVMPqKaen+YQXH6dQvK50w6Cgsi6SsGq9Hkbts+jiyVv9CdTjTep6jFmpfo+KxiABCnoBsJNNyDFq377yLm6/vpEwrT0O2N4ShkHYlUxJVA39dQlTglWTqNFo9QKJ9dyJImMkld7CIOgnHqpymjMiYVoKiBBoi5syYwgkpMijqtG3BuyHmFQuEohRJvJykuznysBv+RMh6A3P2fNeyB8mYwGsnVAWbIeqI1vM/Ud+4YooER/klJvOMCTB2vb8qWwJINPBC5WExNm2ck5AEyQywRbIeP8XHaGOgcwK6k/u8voRxRmbXdYzeSH5UayqjAqNoxcQ8tdxAyXhYFkPpkUY9dH6m2pSVgeMKvUtRl7PekS3IGMcvr5bCTBzGrDq5dgPG9WGiB X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(82310400026)(7416014)(1800799024)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Apr 2025 04:58:38.3190 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 68572d6e-6665-4165-c15d-08dd7bda2f6c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00029927.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB8817 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250414_215843_518973_ECB2A24B X-CRM114-Status: GOOD ( 17.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Now the new S2 invalidation routines in arm-smmu-v3-iommufd are ready to support a shared S2 nest_parent domain across multiple vSMMU instances. Move the vmid allocation/releasing to the vSMMU allocator/destroyer too. Then, move the vsmmus list next to s2_cfg in the struct arm_smmu_domain, as they can be exclusive now. Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 12 ++++++------ .../iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 15 ++++++++++++--- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 9 ++++++--- 3 files changed, 24 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 477d4d2f19a6..dfb9d5f935e4 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -857,13 +857,13 @@ struct arm_smmu_domain { enum arm_smmu_domain_stage stage; union { - struct arm_smmu_ctx_desc cd; - struct arm_smmu_s2_cfg s2_cfg; + struct arm_smmu_ctx_desc cd; /* S1 */ + struct arm_smmu_s2_cfg s2_cfg; /* S2 && !nest_parent */ + struct { /* S2 && nest_parent */ + struct list_head list; + spinlock_t lock; + } vsmmus; }; - struct { - struct list_head list; - spinlock_t lock; - } vsmmus; struct iommu_domain domain; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c index 491f2b88e30b..5d05f8a78215 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c @@ -118,6 +118,7 @@ static void arm_vsmmu_destroy(struct iommufd_viommu *viommu) /* Must flush S2 vmid after delinking vSMMU */ arm_smmu_tlb_inv_vmid(vsmmu->smmu, vsmmu->vmid); arm_vsmmu_atc_inv_domain(vsmmu, 0, 0); + ida_free(&vsmmu->smmu->vmid_map, vsmmu->vmid); } static void arm_smmu_make_nested_cd_table_ste( @@ -511,6 +512,7 @@ struct iommufd_viommu *arm_vsmmu_alloc(struct device *dev, struct arm_smmu_domain *s2_parent = to_smmu_domain(parent); struct arm_vsmmu *vsmmu; unsigned long flags; + int vmid; if (viommu_type != IOMMU_VIOMMU_TYPE_ARM_SMMUV3) return ERR_PTR(-EOPNOTSUPP); @@ -541,15 +543,22 @@ struct iommufd_viommu *arm_vsmmu_alloc(struct device *dev, !(smmu->features & ARM_SMMU_FEAT_S2FWB)) return ERR_PTR(-EOPNOTSUPP); + vmid = ida_alloc_range(&smmu->vmid_map, 1, (1 << smmu->vmid_bits) - 1, + GFP_KERNEL); + if (vmid < 0) + return ERR_PTR(vmid); + vsmmu = iommufd_viommu_alloc(ictx, struct arm_vsmmu, core, &arm_vsmmu_ops); - if (IS_ERR(vsmmu)) + if (IS_ERR(vsmmu)) { + ida_free(&smmu->vmid_map, vmid); return ERR_CAST(vsmmu); + } vsmmu->smmu = smmu; + vsmmu->vmid = (u16)vmid; vsmmu->s2_parent = s2_parent; - /* FIXME Move VMID allocation from the S2 domain allocation to here */ - vsmmu->vmid = s2_parent->s2_cfg.vmid; + spin_lock_irqsave(&s2_parent->vsmmus.lock, flags); list_add_tail(&vsmmu->vsmmus_elm, &s2_parent->vsmmus.list); spin_unlock_irqrestore(&s2_parent->vsmmus.lock, flags); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 4b9cdfb177ca..8047b60ec024 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2474,7 +2474,7 @@ static void arm_smmu_domain_free_paging(struct iommu_domain *domain) mutex_lock(&arm_smmu_asid_lock); xa_erase(&arm_smmu_asid_xa, smmu_domain->cd.asid); mutex_unlock(&arm_smmu_asid_lock); - } else { + } else if (!smmu_domain->nest_parent) { struct arm_smmu_s2_cfg *cfg = &smmu_domain->s2_cfg; if (cfg->vmid) ida_free(&smmu->vmid_map, cfg->vmid); @@ -2503,7 +2503,10 @@ static int arm_smmu_domain_finalise_s2(struct arm_smmu_device *smmu, struct arm_smmu_domain *smmu_domain) { int vmid; - struct arm_smmu_s2_cfg *cfg = &smmu_domain->s2_cfg; + + /* nest_parent stores vmid in vSMMU instead of a shared S2 domain */ + if (smmu_domain->nest_parent) + return 0; /* Reserve VMID 0 for stage-2 bypass STEs */ vmid = ida_alloc_range(&smmu->vmid_map, 1, (1 << smmu->vmid_bits) - 1, @@ -2511,7 +2514,7 @@ static int arm_smmu_domain_finalise_s2(struct arm_smmu_device *smmu, if (vmid < 0) return vmid; - cfg->vmid = (u16)vmid; + smmu_domain->s2_cfg.vmid = (u16)vmid; return 0; }