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[178.255.168.63]) by mx.google.com with ESMTPS id n2sm4260333wiy.6.2013.03.26.10.43.56 (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Tue, 26 Mar 2013 10:43:56 -0700 (PDT) From: Michal Simek To: linux-arm-kernel@lists.infradead.org, monstr@monstr.eu, Josh Cartwright , Steffen Trumtrar , Rob Herring Subject: [PATCH v2 04/10] arm: zynq: Load scu baseaddress at run time Date: Tue, 26 Mar 2013 18:43:36 +0100 Message-Id: <76d3fea8e633c122a4bc8bded96814a085a2f239.1364319776.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.7.9.7 In-Reply-To: <1364319822-5504-1-git-send-email-michal.simek@xilinx.com> References: <1364319822-5504-1-git-send-email-michal.simek@xilinx.com> In-Reply-To: References: X-Gm-Message-State: ALoCoQlIr9HBFfGVZk0mSN0P5WcPJCRodQDPZEE8GDoeOW3tJu1LA3IngLIupVNkOWl2Rqkls7Dd X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130326_134359_401253_03E16602 X-CRM114-Status: GOOD ( 13.49 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Use Cortex a9 cp15 to read scu baseaddress. Signed-off-by: Michal Simek --- v2: Remove dynamic mapping because it is probably not needed (code taken from vexpress platsmp code) Remove scu node from DTS Use zynq_scu_map_io() instead of scu_init() as Steffen suggested Add comment to scu_init to be sure that we know what we are doing here --- arch/arm/mach-zynq/common.c | 34 ++++++++++++++++++++++------------ arch/arm/mach-zynq/common.h | 2 ++ 2 files changed, 24 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 68e0907..b53c34d 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -33,10 +33,13 @@ #include #include #include +#include #include #include "common.h" +void __iomem *scu_base; + static struct of_device_id zynq_of_bus_ids[] __initdata = { { .compatible = "simple-bus", }, {} @@ -56,17 +59,6 @@ static void __init xilinx_init_machine(void) of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); } -#define SCU_PERIPH_PHYS 0xF8F00000 -#define SCU_PERIPH_SIZE SZ_8K -#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE) - -static struct map_desc scu_desc __initdata = { - .virtual = SCU_PERIPH_VIRT, - .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), - .length = SCU_PERIPH_SIZE, - .type = MT_DEVICE, -}; - static void __init xilinx_zynq_timer_init(void) { struct device_node *np; @@ -81,13 +73,31 @@ static void __init xilinx_zynq_timer_init(void) clocksource_of_init(); } +static struct map_desc zynq_cortex_a9_scu_map __initdata = { + .length = SZ_256, + .type = MT_DEVICE, +}; + +static void __init zynq_scu_map_io(void) +{ + unsigned long base; + + base = scu_a9_get_base(); + zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base); + /* Expected address is in vmalloc area that's why simple assign here */ + zynq_cortex_a9_scu_map.virtual = base; + iotable_init(&zynq_cortex_a9_scu_map, 1); + scu_base = (void __iomem *)base; + BUG_ON(!scu_base); +} + /** * xilinx_map_io() - Create memory mappings needed for early I/O. */ static void __init xilinx_map_io(void) { debug_ll_io_init(); - iotable_init(&scu_desc, 1); + zynq_scu_map_io(); } static const char *xilinx_dt_match[] = { diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h index 5050bb1..38727a2 100644 --- a/arch/arm/mach-zynq/common.h +++ b/arch/arm/mach-zynq/common.h @@ -17,4 +17,6 @@ #ifndef __MACH_ZYNQ_COMMON_H__ #define __MACH_ZYNQ_COMMON_H__ +extern void __iomem *scu_base; + #endif