From patchwork Mon Oct 29 04:31:20 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Hiremath X-Patchwork-Id: 1660871 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 0388D3FCF7 for ; Mon, 29 Oct 2012 04:34:57 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TSh0p-0007Nq-1w; Mon, 29 Oct 2012 04:31:43 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TSh0l-0007Nc-6o for linux-arm-kernel@lists.infradead.org; Mon, 29 Oct 2012 04:31:40 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id q9T4VPtQ020183; Sun, 28 Oct 2012 23:31:25 -0500 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id q9T4VLi5006512; Mon, 29 Oct 2012 10:01:21 +0530 (IST) Received: from DBDE01.ent.ti.com ([fe80::d5df:c4b5:9919:4e10]) by DBDE71.ent.ti.com ([fe80::692c:15fd:9507:b54%21]) with mapi id 14.01.0323.003; Mon, 29 Oct 2012 10:01:21 +0530 From: "Hiremath, Vaibhav" To: Daniel Mack , "linux-arm-kernel@lists.infradead.org" Subject: RE: [PATCH] ARM: AM33xx: add support for reboot Thread-Topic: [PATCH] ARM: AM33xx: add support for reboot Thread-Index: AQHNtTie7MFhHOMh/UyERhVF+nU78pfPrUAg Date: Mon, 29 Oct 2012 04:31:20 +0000 Message-ID: <79CD15C6BA57404B839C016229A409A83EB50073@DBDE01.ent.ti.com> References: <1351448275-23509-1-git-send-email-zonque@gmail.com> In-Reply-To: <1351448275-23509-1-git-send-email-zonque@gmail.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.24.190.21] MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.40 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: "Nori, Sekhar" , "Mohammed, Afzal" , "linux-omap@vger.kernel.org" , "linux@arm.linux.org.uk" , "arnd@arndb.de" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On Sun, Oct 28, 2012 at 23:47:55, Daniel Mack wrote: > This patch adds the ability to reboot am33xx-based systems. > > Signed-off-by: Daniel Mack > --- > arch/arm/mach-omap2/board-generic.c | 1 + > arch/arm/mach-omap2/prcm.c | 6 ++++++ > 2 files changed, 7 insertions(+) > > diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c > index 601ecdf..6a69ceb 100644 > --- a/arch/arm/mach-omap2/board-generic.c > +++ b/arch/arm/mach-omap2/board-generic.c > @@ -114,6 +114,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") > .init_machine = omap_generic_init, > .timer = &omap3_am33xx_timer, > .dt_compat = am33xx_boards_compat, > + .restart = omap_prcm_restart, > MACHINE_END > #endif > > diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c > index 0f51e03..8a3068a 100644 > --- a/arch/arm/mach-omap2/prcm.c > +++ b/arch/arm/mach-omap2/prcm.c > @@ -32,6 +32,7 @@ > #include "clock2xxx.h" > #include "cm2xxx_3xxx.h" > #include "prm2xxx_3xxx.h" > +#include "prm33xx.h" > #include "prm44xx.h" > #include "prminst44xx.h" > #include "cminst44xx.h" > @@ -72,6 +73,11 @@ void omap_prcm_restart(char mode, const char *cmd) > omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); > } else if (cpu_is_omap44xx()) { > omap4_prminst_global_warm_sw_reset(); /* never returns */ > + } else if (soc_is_am33xx()) { > + prcm_offs = AM33XX_PRM_DEVICE_MOD; > + omap2_prm_set_mod_reg_bits(OMAP4430_RST_GLOBAL_COLD_SW_MASK, > + prcm_offs, > + AM33XX_PRM_RSTCTRL_OFFSET); This is not clean way of handling it, we should have something similar to omap4. Also we should use warm-reset here instead of cold. I have quickly created patch, can you please review and test is? I have tested it on AM335x EVM and Bone platform. Thanks, Vaibhav diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 601ecdf..6a69ceb 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -114,6 +114,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") .init_machine = omap_generic_init, .timer = &omap3_am33xx_timer, .dt_compat = am33xx_boards_compat, + .restart = omap_prcm_restart, MACHINE_END #endif diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 0f51e03..490f8f6 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -33,6 +33,7 @@ #include "cm2xxx_3xxx.h" #include "prm2xxx_3xxx.h" #include "prm44xx.h" +#include "prm33xx.h" #include "prminst44xx.h" #include "cminst44xx.h" #include "prm-regbits-24xx.h" @@ -72,6 +73,8 @@ void omap_prcm_restart(char mode, const char *cmd) omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); } else if (cpu_is_omap44xx()) { omap4_prminst_global_warm_sw_reset(); /* never returns */ + } else if (soc_is_am33xx()) { + am33xx_prm_global_warm_sw_reset(); /* never returns */ } else { WARN_ON(1); } diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c index e7dbb6c..505219d 100644 --- a/arch/arm/mach-omap2/prm33xx.c +++ b/arch/arm/mach-omap2/prm33xx.c @@ -133,3 +133,18 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst, return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; } + +void am33xx_prm_global_warm_sw_reset(void) +{ + u32 v; + + v = am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD, + AM33XX_PRM_RSTCTRL_OFFSET); + v |= AM33XX_GLOBAL_WARM_SW_RST_MASK; + am33xx_prm_write_reg(v, AM33XX_PRM_DEVICE_MOD, + AM33XX_PRM_RSTCTRL_OFFSET); + + /* OCP barrier */ + v = am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD, + AM33XX_PRM_RSTCTRL_OFFSET); +} diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h index 3f25c56..cdfc694 100644 --- a/arch/arm/mach-omap2/prm33xx.h +++ b/arch/arm/mach-omap2/prm33xx.h @@ -126,4 +126,5 @@ extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst, extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs); extern int am33xx_prm_deassert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs, u16 rstst_offs); +extern void am33xx_prm_global_warm_sw_reset(void);