diff mbox series

arm64: dts: renesas: eagle: Add SCIF_CLK support

Message ID 7dddaa362945118deab534ccfddfc0870abe8526.1673271243.git.geert+renesas@glider.be (mailing list archive)
State New, archived
Headers show
Series arm64: dts: renesas: eagle: Add SCIF_CLK support | expand

Commit Message

Geert Uytterhoeven Jan. 9, 2023, 1:35 p.m. UTC
Describe the external SCIF clock crystal, which can be used as a clock
source for the (High Speed) Serial Communication Interfaces with FIFO.

This improves serial console accuracy from 115200-257 bps to
115200+0 bps.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Tested with a remote Eagle.

To be queued in renesas-devel for v6.3.
---
 arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
index 004a5eacd460da95..405404c0843d9747 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
@@ -287,6 +287,9 @@  lvds0_out: endpoint {
 };
 
 &pfc {
+	pinctrl-0 = <&scif_clk_pins>;
+	pinctrl-names = "default";
+
 	avb_pins: avb0 {
 		groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
 		function = "avb0";
@@ -316,6 +319,11 @@  scif0_pins: scif0 {
 		groups = "scif0_data";
 		function = "scif0";
 	};
+
+	scif_clk_pins: scif_clk {
+		groups = "scif_clk_b";
+		function = "scif_clk";
+	};
 };
 
 &rpc {
@@ -391,3 +399,7 @@  &scif0 {
 
 	status = "okay";
 };
+
+&scif_clk {
+	clock-frequency = <14745600>;
+};