| Message ID | 7eea4ebdb19d5f43d24074a166e6c46bb5424d46.1739218324.git.dsimic@manjaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: rockchip: Reflow Quartz64 Model A/B board dts files a bit | expand |
On Mon, 10 Feb 2025 21:17:00 +0100, Dragan Simic wrote: > Going over the 80-column width limit, and using all 100 columns, is intended > for improving code readability. This wasn't the case in a few places in the > Quartz64 Model A/B board dts files, so let's reflow them a bit, to both obey > the 80-column limit and make them a bit more readable. > > No intended functional changes are introduced by these changes. > > [...] Applied, thanks! [1/1] arm64: dts: rockchip: Reflow Quartz64 Model A/B board dts files a bit commit: e857cdedbe1f9aedad4e307188c55ccba28a3e76 Best regards,
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index 98e75df8b158..3c127c5c2607 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -265,8 +265,12 @@ map1 { }; &gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, + <&cru SCLK_GMAC1_RGMII_SPEED>, + <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, + <&cru SCLK_GMAC1>, + <&gmac1_clkin>; clock_in_out = "input"; phy-supply = <&vcc_3v3>; phy-mode = "rgmii"; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts index 24928a129446..5707321a1144 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts @@ -173,8 +173,12 @@ &cpu3 { }; &gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, + <&cru SCLK_GMAC1_RGMII_SPEED>, + <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, + <&cru SCLK_GMAC1>, + <&gmac1_clkin>; clock_in_out = "input"; phy-mode = "rgmii"; phy-supply = <&vcc_3v3>;
Going over the 80-column width limit, and using all 100 columns, is intended for improving code readability. This wasn't the case in a few places in the Quartz64 Model A/B board dts files, so let's reflow them a bit, to both obey the 80-column limit and make them a bit more readable. No intended functional changes are introduced by these changes. Signed-off-by: Dragan Simic <dsimic@manjaro.org> --- arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 8 ++++++-- arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts | 8 ++++++-- 2 files changed, 12 insertions(+), 4 deletions(-)