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Wysocki" , Robert Moore , Robin Murphy , Sudeep Holla , Will Deacon Cc: Eric Auger , Jean-Philippe Brucker , Moritz Fischer , Michael Shavit , Nicolin Chen , patches@lists.linux.dev, Shameerali Kolothum Thodi Subject: [PATCH 8/8] iommu/arm-smmu-v3: Add arm_smmu_cache_invalidate_user Date: Tue, 6 Aug 2024 20:41:21 -0300 Message-ID: <8-v1-54e734311a7f+14f72-smmuv3_nesting_jgg@nvidia.com> In-Reply-To: <0-v1-54e734311a7f+14f72-smmuv3_nesting_jgg@nvidia.com> References: X-ClientProxiedBy: BN7PR06CA0045.namprd06.prod.outlook.com (2603:10b6:408:34::22) To CH3PR12MB7763.namprd12.prod.outlook.com (2603:10b6:610:145::10) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PR12MB7763:EE_|DS0PR12MB9422:EE_ X-MS-Office365-Filtering-Correlation-Id: 3aff12e2-947e-4b08-e972-08dcb671480f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|1800799024|366016|376014|921020; X-Microsoft-Antispam-Message-Info: 9jKFeSudMMsVXqZk+GBRiIbXyKjZLakjdIaDudSrvx92ynIusOXB24jna+F/cjaOyNXbtk7tHKJQCZ5TXHlG3Eu7MrNT2rTQA8BV77BEfi9cr5fJQ1Dg20XXBwneniR6dt5yhg0mM9S1VDxLyhDWrywTObbTEfZ0QWverVpw/SYieCX9G5Qa6WLEHaroZV9pTHvAPmzNKoYcZYOzdtj0ZEb9c0rutzm92vaG/frZsSApxe89mRN/gN8/l96yAXQ3LOcOOYrn10PGjhUYL/69z9XV7ydrBD70QhS1YIV7LArirPDt/UrSf4nbE/ORDVfr7Y9KRCgUR+gLCQcfGB7p34CMKNsxmb67b28YVz6mCG9iHhyFGPLB1otSwZj9AOys9BUjhimEaM/9swlB6Sw9TjEeDpPGUxfIE3lgRlz1woa1elGMKlLZFFm/JLWJeQqlYPVgpEfq+9GFhVlsu27pvmFv4s0wqc3YDr4ADf0GgvUvuQAhTIwEff9pwS2fXC6kB0Gk5OQi/ZtH6/gwreeib42Hg6VAZBtoYwc9hxEbsvu9De3lNe5Tv5oBXJMBfiG85duD40kxsKz2Ryai40LOGJEFUocQr5G9Xgw01EwSOzb+Eg6lRzQkEbLQxk8YHmJxNkEh6ixqcSZ8mXFYgSRk4BOXPOtDCW7dLNB6FTcVwLvshDd1JyCk0gabIuw24WaAN5iqZO7Ez5G0zrcCx/tb2A5LX+AMjXEY4x7zsUGU50kbzI9h7X3edkGicCJNGjCFg4ZB7W+TLZvv+v/nXSqsDnSa4yziuYDm/v+MvxVZCh75y10B9bDbJmaiZ9a1TuGHup3oirXOvBtqF/yo4Rz2diXX6p4/UB5lpqoYsVsLtBmB62OZHCDCEqT0usuknhxjjmjgSJYAhAr30XnPqaGSGxdGsJtUtP0d+0bQudHtSbr76N1sNqwmqFkThTnW3FpeB8RbMWuUkSeviNt9bxISpTZL+9Ps2PS8Z2jk0e8EO9tvGMB3LA+YzYQFDa5udOiF+6pz7btZUa+lLD9vF+9woRIE228eZ9q9+rD2zqy38gFMD4Aya+o7Fo/Vh0V8U1/tonzrqoncImeU3HvxYUf6fjUYAFETuen6qo38xtnn9gF08NDax8S1DYSWb69Wyx2Pfjnlt6aW4n3cuixmKx50f/b6WTcisHX1KOgQbsif16dNVscbzXcBHzCz/NwWldoQ+/UmB8xqM1ZqL8TR/VJS/xwCCSU9/oNgZ6Jq6S6/Cisxwb0K6q1HYZM3/HOqXc/dVJDIKe6rariOR//fwaGQu+Ls2gO758+P/sVwuksXox6BMyGNf3s5JlqbI+IHsl8syceRLqkgG0jmjI8ER2HwHUSZi8wcNnBXgf7NkCo6dKqt4bvXhaiFcga6kI6XVdYV X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH3PR12MB7763.namprd12.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(7416014)(1800799024)(366016)(376014)(921020);DIR:OUT;SFP:1101; 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Add struct iommu_hwpt_arm_smmuv3_invalidate defining an invalidation entry that is simply the native format of a 128-bit TLBI command. Scan commands against the permitted command list and fix their VMID fields. Co-developed-by: Eric Auger Signed-off-by: Eric Auger Signed-off-by: Nicolin Chen Signed-off-by: Jason Gunthorpe --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 95 +++++++++++++++++++++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + include/linux/iommu.h | 49 ++++++++++- include/uapi/linux/iommufd.h | 24 ++++++ 4 files changed, 168 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 5dbaffd7937747..24836f3269b3f4 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3219,9 +3219,96 @@ static void arm_smmu_domain_nested_free(struct iommu_domain *domain) kfree(container_of(domain, struct arm_smmu_nested_domain, domain)); } +/* + * Convert, in place, the raw invalidation command into an internal format that + * can be passed to arm_smmu_cmdq_issue_cmdlist(). Internally commands are + * stored in CPU endian. + * + * Enforce the VMID on the command. + */ +static int +arm_smmu_convert_user_cmd(struct arm_smmu_nested_domain *nested_domain, + struct iommu_hwpt_arm_smmuv3_invalidate *cmd) +{ + u16 vmid = nested_domain->s2_parent->s2_cfg.vmid; + + cmd->cmd[0] = le64_to_cpu(cmd->cmd[0]); + cmd->cmd[1] = le64_to_cpu(cmd->cmd[1]); + + switch (cmd->cmd[0] & CMDQ_0_OP) { + case CMDQ_OP_TLBI_NSNH_ALL: + /* Convert to NH_ALL */ + cmd->cmd[0] = CMDQ_OP_TLBI_NH_ALL | + FIELD_PREP(CMDQ_TLBI_0_VMID, vmid); + cmd->cmd[1] = 0; + break; + case CMDQ_OP_TLBI_NH_VA: + case CMDQ_OP_TLBI_NH_VAA: + case CMDQ_OP_TLBI_NH_ALL: + case CMDQ_OP_TLBI_NH_ASID: + cmd->cmd[0] &= ~CMDQ_TLBI_0_VMID; + cmd->cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_VMID, vmid); + break; + default: + return -EIO; + } + return 0; +} + +static int arm_smmu_cache_invalidate_user(struct iommu_domain *domain, + struct iommu_user_data_array *array) +{ + struct arm_smmu_nested_domain *nested_domain = + container_of(domain, struct arm_smmu_nested_domain, domain); + struct arm_smmu_device *smmu = nested_domain->s2_parent->smmu; + struct iommu_hwpt_arm_smmuv3_invalidate *last_batch; + struct iommu_hwpt_arm_smmuv3_invalidate *cmds; + struct iommu_hwpt_arm_smmuv3_invalidate *cur; + struct iommu_hwpt_arm_smmuv3_invalidate *end; + int ret; + + cmds = kcalloc(array->entry_num, sizeof(*cmds), GFP_KERNEL); + if (!cmds) + return -ENOMEM; + cur = cmds; + end = cmds + array->entry_num; + + static_assert(sizeof(*cmds) == 2 * sizeof(u64)); + ret = iommu_copy_struct_from_full_user_array( + cmds, sizeof(*cmds), array, + IOMMU_HWPT_INVALIDATE_DATA_ARM_SMMUV3); + if (ret) + goto out; + + last_batch = cmds; + while (cur != end) { + ret = arm_smmu_convert_user_cmd(nested_domain, cur); + if (ret) + goto out; + + /* FIXME work in blocks of CMDQ_BATCH_ENTRIES and copy each block? */ + cur++; + if (cur != end && (cur - last_batch) != CMDQ_BATCH_ENTRIES - 1) + continue; + + ret = arm_smmu_cmdq_issue_cmdlist(smmu, last_batch->cmd, + cur - last_batch, true); + if (ret) { + cur--; + goto out; + } + last_batch = cur; + } +out: + array->entry_num = cur - cmds; + kfree(cmds); + return ret; +} + static const struct iommu_domain_ops arm_smmu_nested_ops = { .attach_dev = arm_smmu_attach_dev_nested, .free = arm_smmu_domain_nested_free, + .cache_invalidate_user = arm_smmu_cache_invalidate_user, }; static struct iommu_domain * @@ -3249,6 +3336,14 @@ arm_smmu_domain_alloc_nesting(struct device *dev, u32 flags, !(master->smmu->features & ARM_SMMU_FEAT_S2FWB)) return ERR_PTR(-EOPNOTSUPP); + /* + * FORCE_SYNC is not set with FEAT_NESTING. Some study of the exact HW + * defect is needed to determine if arm_smmu_cache_invalidate_user() + * needs any change to remove this. + */ + if (WARN_ON(master->smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC)) + return ERR_PTR(-EOPNOTSUPP); + ret = iommu_copy_struct_from_user(&arg, user_data, IOMMU_HWPT_DATA_ARM_SMMUV3, ste); if (ret) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index e149eddb568e7e..3f7442f0167efb 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -521,6 +521,7 @@ struct arm_smmu_cmdq_ent { #define CMDQ_OP_TLBI_NH_ALL 0x10 #define CMDQ_OP_TLBI_NH_ASID 0x11 #define CMDQ_OP_TLBI_NH_VA 0x12 + #define CMDQ_OP_TLBI_NH_VAA 0x13 #define CMDQ_OP_TLBI_EL2_ALL 0x20 #define CMDQ_OP_TLBI_EL2_ASID 0x21 #define CMDQ_OP_TLBI_EL2_VA 0x22 diff --git a/include/linux/iommu.h b/include/linux/iommu.h index d1660ec23f263b..b0323290cb6c72 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -491,7 +491,9 @@ static inline int __iommu_copy_struct_from_user_array( * @index: Index to the location in the array to copy user data from * @min_last: The last member of the data structure @kdst points in the * initial version. - * Return 0 for success, otherwise -error. + * + * Copy a single entry from a user array. Return 0 for success, otherwise + * -error. */ #define iommu_copy_struct_from_user_array(kdst, user_array, data_type, index, \ min_last) \ @@ -499,6 +501,51 @@ static inline int __iommu_copy_struct_from_user_array( kdst, user_array, data_type, index, sizeof(*(kdst)), \ offsetofend(typeof(*(kdst)), min_last)) + +/** + * iommu_copy_struct_from_full_user_array - Copy iommu driver specific user + * space data from an iommu_user_data_array + * @kdst: Pointer to an iommu driver specific user data that is defined in + * include/uapi/linux/iommufd.h + * @kdst_entry_size: sizeof(*kdst) + * @user_array: Pointer to a struct iommu_user_data_array for a user space + * array + * @data_type: The data type of the @kdst. Must match with @user_array->type + * + * Copy the entire user array. kdst must have room for kdst_entry_size * + * user_array->entry_num bytes. Return 0 for success, otherwise -error. + */ +static inline int +iommu_copy_struct_from_full_user_array(void *kdst, size_t kdst_entry_size, + struct iommu_user_data_array *user_array, + unsigned int data_type) +{ + unsigned int i; + int ret; + + if (user_array->type != data_type) + return -EINVAL; + if (!user_array->entry_num) + return -EINVAL; + if (likely(user_array->entry_len == kdst_entry_size)) { + if (copy_from_user(kdst, user_array->uptr, + user_array->entry_num * + user_array->entry_len)) + return -EFAULT; + } + + /* Copy item by item */ + for (i = 0; i != user_array->entry_num; i++) { + ret = copy_struct_from_user( + kdst + kdst_entry_size * i, kdst_entry_size, + user_array->uptr + user_array->entry_len * i, + user_array->entry_len); + if (ret) + return ret; + } + return 0; +} + /** * struct iommu_ops - iommu ops and capabilities * @capable: check capability diff --git a/include/uapi/linux/iommufd.h b/include/uapi/linux/iommufd.h index 76e9ad6c9403af..f2d1677ddec445 100644 --- a/include/uapi/linux/iommufd.h +++ b/include/uapi/linux/iommufd.h @@ -682,9 +682,11 @@ struct iommu_hwpt_get_dirty_bitmap { * enum iommu_hwpt_invalidate_data_type - IOMMU HWPT Cache Invalidation * Data Type * @IOMMU_HWPT_INVALIDATE_DATA_VTD_S1: Invalidation data for VTD_S1 + * @IOMMU_HWPT_INVALIDATE_DATA_ARM_SMMUV3: Invalidation data for ARM SMMUv3 */ enum iommu_hwpt_invalidate_data_type { IOMMU_HWPT_INVALIDATE_DATA_VTD_S1 = 0, + IOMMU_HWPT_INVALIDATE_DATA_ARM_SMMUV3 = 1, }; /** @@ -723,6 +725,28 @@ struct iommu_hwpt_vtd_s1_invalidate { __u32 __reserved; }; +/** + * struct iommu_hwpt_arm_smmuv3_invalidate - ARM SMMUv3 cahce invalidation + * (IOMMU_HWPT_INVALIDATE_DATA_ARM_SMMUV3) + * @cmd: 128-bit cache invalidation command that runs in SMMU CMDQ. + * Must be little-endian. + * + * Supported command list: + * CMDQ_OP_TLBI_NSNH_ALL + * CMDQ_OP_TLBI_NH_VA + * CMDQ_OP_TLBI_NH_VAA + * CMDQ_OP_TLBI_NH_ALL + * CMDQ_OP_TLBI_NH_ASID + * + * This API does not support ATS invalidation. Userspace must not request EATS, + * or enable ATS in the IDR. + * + * -EIO will be returned if the command is not supported. + */ +struct iommu_hwpt_arm_smmuv3_invalidate { + __aligned_u64 cmd[2]; +}; + /** * struct iommu_hwpt_invalidate - ioctl(IOMMU_HWPT_INVALIDATE) * @size: sizeof(struct iommu_hwpt_invalidate)