From patchwork Fri Aug 11 22:28:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Br=C3=BCns?= X-Patchwork-Id: 9896687 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E9388602DA for ; Fri, 11 Aug 2017 22:34:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C8F5928BE3 for ; Fri, 11 Aug 2017 22:34:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BC5B328C32; Fri, 11 Aug 2017 22:34:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5263028BE3 for ; Fri, 11 Aug 2017 22:34:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Message-ID:MIME-Version:References: In-Reply-To:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=PaBJEN83Uh3EgXCGt04IT/AZQMhgaHlZlyTkEiMh6og=; b=MR00heZp70c+dZ G0NKif61DfpOXts3L8uThkVigvA+rNXQCGZFH4vpx/0TYo8gEmAPjFSwSi9Fl1qh9tZIK+Cf7jSRj V5sV/bjjeyuOQK40SnFbpD7Dywf8/m9mhLACUgmTN3HV9mXN+scNrLEUo+wVN7j3Z6Gro9mTnVP18 QJCIkBmJmZZtCPJxVVaqlxNUNtlRMt1wMSP2s31R7B1OwhWlonYv47mQsLCAreEfs4IRTUyXShX8X LD3Q4D6Hoo34qdQU59M8bE2TQE7gmVL0h/+CCQ9m65T0Efz5a5uqWB2z9m3lBpeQTaaN7l/qSl6vY qdS1WAr7wnuI8IfU/djQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dgIVA-0006y1-Mr; Fri, 11 Aug 2017 22:33:56 +0000 Received: from mail-out-2.itc.rwth-aachen.de ([134.130.5.47]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dgIQH-0004h5-7i for linux-arm-kernel@lists.infradead.org; Fri, 11 Aug 2017 22:28:57 +0000 X-IronPort-AV: E=Sophos;i="5.41,359,1498514400"; d="scan'208";a="8258001" Received: from rwthex-w2-b.rwth-ad.de ([134.130.26.159]) by mail-in-2.itc.rwth-aachen.de with ESMTP; 12 Aug 2017 00:28:27 +0200 Received: from pebbles.fritz.box (77.182.178.77) by rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) with Microsoft SMTP Server (TLS) id 15.0.1293.2; Sat, 12 Aug 2017 00:28:24 +0200 From: =?UTF-8?q?Stefan=20Br=C3=BCns?= To: Subject: [PATCH 1/2] arm64: allwinner: a64: add SPI nodes Date: Sat, 12 Aug 2017 00:28:12 +0200 X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170811222813.1567-1-stefan.bruens@rwth-aachen.de> References: <20170811222813.1567-1-stefan.bruens@rwth-aachen.de> MIME-Version: 1.0 X-Originating-IP: [77.182.178.77] X-ClientProxiedBy: rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) To rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) Message-ID: <83987158c44545c7b8c1625049d1e65d@rwthex-w2-b.rwth-ad.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170811_152853_659278_26FDA2DD X-CRM114-Status: UNSURE ( 5.83 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Maxime Ripard , Chen-Yu Tsai , linux-kernel@vger.kernel.org, Rob Herring , =?UTF-8?q?Stefan=20Br=C3=BCns?= Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The A64 SPI controllers are register compatible to the h3/h5 SPI controllers. The A64 has two SPI controllers, each with a single chip select. The handles for the DMA channels (23/24 for SPI0/SPI1) are omitted, as the A64 DMA support is currently missing. Signed-off-by: Stefan Brüns --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 40 +++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index bd0f33b77f57..373cd14f0206 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -325,6 +325,16 @@ drive-strength = <40>; }; + spi0_pins: spi0 { + pins = "PC0", "PC1", "PC2", "PC3"; + function = "spi0"; + }; + + spi1_pins: spi1 { + pins = "PD0", "PD1", "PD2", "PD3"; + function = "spi1"; + }; + uart0_pins_a: uart0@0 { pins = "PB8", "PB9"; function = "uart0"; @@ -527,5 +537,35 @@ #address-cells = <1>; #size-cells = <0>; }; + + spi0: spi@01c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; + clock-names = "ahb", "mod"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>; + resets = <&ccu RST_BUS_SPI0>; + status = "disabled"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi1: spi@01c69000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c69000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; + clock-names = "ahb", "mod"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; + resets = <&ccu RST_BUS_SPI1>; + status = "disabled"; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; }; };