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Received: from kirsty.vergenet.net ([202.4.237.240]) by casper.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gRGaL-0005w7-Jo for linux-arm-kernel@lists.infradead.org; Mon, 26 Nov 2018 13:05:59 +0000 Received: from reginn.horms.nl (watermunt.horms.nl [80.127.179.77]) by kirsty.vergenet.net (Postfix) with ESMTPA id E0CBD25BF3A; Mon, 26 Nov 2018 23:55:11 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1543236912; bh=7FBSw8qTuf7WllEKboJKOZ2bAEl9dCzZZjtRyyUL7NY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=owczS2cjou4LLC542zyjM9qRMdY/XoRfduZHYZJGPHoaUV3Zm+twZ7fuafVPnkqdv gL4D26gmNC8pYrSWDTFy5TbX5zm7aFu/aUfWrVAD2sZL7TuA/eFgwxIxeaPEC9OdCS vLgraoLtORlk42Zz96fHT6vBePSJITYZsAcWpBPw= Received: by reginn.horms.nl (Postfix, from userid 7100) id 8E924940AB5; Mon, 26 Nov 2018 13:55:09 +0100 (CET) From: Simon Horman To: linux-renesas-soc@vger.kernel.org Subject: [PATCH 29/40] arm64: dts: renesas: r8a774a1: Replace clock magic numbers Date: Mon, 26 Nov 2018 13:54:55 +0100 Message-Id: <8ebb50389eed04b989a0d5532f9208c338bf66b8.1543229515.git.horms+renesas@verge.net.au> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181126_130558_222633_B8E50103 X-CRM114-Status: GOOD ( 11.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fabrizio Castro , Simon Horman , Magnus Damm , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Fabrizio Castro Now that include/dt-bindings/clock/r8a774a1-cpg-mssr.h is in Linus' master branch we can replace clock related magic numbers with the corresponding labels. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven [simon: corrected whitespace] Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 38 +++++++++++++++---------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi index d549755a4025..20745a8528c5 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi @@ -7,7 +7,7 @@ #include #include -#include +#include #include / { @@ -67,7 +67,7 @@ power-domains = <&sysc R8A774A1_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; - clocks = <&cpg CPG_CORE 0>; + clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>; }; a57_1: cpu@1 { @@ -77,7 +77,7 @@ power-domains = <&sysc R8A774A1_PD_CA57_CPU1>; next-level-cache = <&L2_CA57>; enable-method = "psci"; - clocks = <&cpg CPG_CORE 0>; + clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>; }; a53_0: cpu@100 { @@ -87,7 +87,7 @@ power-domains = <&sysc R8A774A1_PD_CA53_CPU0>; next-level-cache = <&L2_CA53>; enable-method = "psci"; - clocks =<&cpg CPG_CORE 1>; + clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>; }; a53_1: cpu@101 { @@ -97,7 +97,7 @@ power-domains = <&sysc R8A774A1_PD_CA53_CPU1>; next-level-cache = <&L2_CA53>; enable-method = "psci"; - clocks =<&cpg CPG_CORE 1>; + clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>; }; a53_2: cpu@102 { @@ -107,7 +107,7 @@ power-domains = <&sysc R8A774A1_PD_CA53_CPU2>; next-level-cache = <&L2_CA53>; enable-method = "psci"; - clocks =<&cpg CPG_CORE 1>; + clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>; }; a53_3: cpu@103 { @@ -117,7 +117,7 @@ power-domains = <&sysc R8A774A1_PD_CA53_CPU3>; next-level-cache = <&L2_CA53>; enable-method = "psci"; - clocks =<&cpg CPG_CORE 1>; + clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>; }; L2_CA57: cache-controller-0 { @@ -515,7 +515,7 @@ reg = <0 0xe6540000 0 0x60>; interrupts = ; clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE 19>, + <&cpg CPG_CORE R8A774A1_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x31>, <&dmac1 0x30>, @@ -533,7 +533,7 @@ reg = <0 0xe6550000 0 0x60>; interrupts = ; clocks = <&cpg CPG_MOD 519>, - <&cpg CPG_CORE 19>, + <&cpg CPG_CORE R8A774A1_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x33>, <&dmac1 0x32>, @@ -551,7 +551,7 @@ reg = <0 0xe6560000 0 0x60>; interrupts = ; clocks = <&cpg CPG_MOD 518>, - <&cpg CPG_CORE 19>, + <&cpg CPG_CORE R8A774A1_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x35>, <&dmac1 0x34>, @@ -569,7 +569,7 @@ reg = <0 0xe66a0000 0 0x60>; interrupts = ; clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE 19>, + <&cpg CPG_CORE R8A774A1_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x37>, <&dmac0 0x36>; @@ -586,7 +586,7 @@ reg = <0 0xe66b0000 0 0x60>; interrupts = ; clocks = <&cpg CPG_MOD 516>, - <&cpg CPG_CORE 19>, + <&cpg CPG_CORE R8A774A1_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x39>, <&dmac0 0x38>; @@ -974,7 +974,7 @@ reg = <0 0xe6e60000 0 0x40>; interrupts = ; clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE 19>, + <&cpg CPG_CORE R8A774A1_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x51>, <&dmac1 0x50>, @@ -991,7 +991,7 @@ reg = <0 0xe6e68000 0 0x40>; interrupts = ; clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE 19>, + <&cpg CPG_CORE R8A774A1_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x53>, <&dmac1 0x52>, @@ -1008,7 +1008,7 @@ reg = <0 0xe6e88000 0 0x40>; interrupts = ; clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE 19>, + <&cpg CPG_CORE R8A774A1_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; @@ -1022,7 +1022,7 @@ reg = <0 0xe6c50000 0 0x40>; interrupts = ; clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE 19>, + <&cpg CPG_CORE R8A774A1_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x57>, <&dmac0 0x56>; @@ -1038,7 +1038,7 @@ reg = <0 0xe6c40000 0 0x40>; interrupts = ; clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE 19>, + <&cpg CPG_CORE R8A774A1_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x59>, <&dmac0 0x58>; @@ -1054,7 +1054,7 @@ reg = <0 0xe6f30000 0 0x40>; interrupts = ; clocks = <&cpg CPG_MOD 202>, - <&cpg CPG_CORE 19>, + <&cpg CPG_CORE R8A774A1_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, @@ -1420,7 +1420,7 @@ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, - <&cpg CPG_CORE 10>; + <&cpg CPG_CORE R8A774A1_CLK_S0D4>; clock-names = "ssi-all", "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", "ssi.4", "ssi.3", "ssi.2",