From patchwork Fri Aug 2 13:37:36 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Afzal Mohammed X-Patchwork-Id: 2837917 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0C650BF535 for ; Fri, 2 Aug 2013 13:39:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AC60920490 for ; Fri, 2 Aug 2013 13:39:48 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 54B7C20489 for ; Fri, 2 Aug 2013 13:39:47 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V5FZ7-0002rZ-Tw; Fri, 02 Aug 2013 13:38:47 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V5FYY-0002yX-NX; Fri, 02 Aug 2013 13:38:10 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V5FYU-0002vF-If for linux-arm-kernel@lists.infradead.org; Fri, 02 Aug 2013 13:38:08 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r72Dbec3013772; Fri, 2 Aug 2013 08:37:40 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r72DbeBd014768; Fri, 2 Aug 2013 08:37:40 -0500 Received: from dlelxv23.itg.ti.com (172.17.1.198) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Fri, 2 Aug 2013 08:37:39 -0500 Received: from afzal-Latitude-E6420.india.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id r72DbbtT010153; Fri, 2 Aug 2013 08:37:37 -0500 From: Afzal Mohammed To: , Subject: [PATCH v2 07/13] ARM: OMAP2+: PM: AM43x powerdomain data Date: Fri, 2 Aug 2013 19:07:36 +0530 Message-ID: <8ff0cca7b787364ff72302ba51264d9e56012b67.1375443858.git.afzal@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130802_093806_789667_EFF6C259 X-CRM114-Status: GOOD ( 16.69 ) X-Spam-Score: -8.4 (--------) Cc: Tony Lindgren , Benoit Cousson , Paul Walmsley , Ambresh K , benoit.cousson@gmail.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ambresh K Add the data file to describe all power domains in AM43x SoC. OMAP4 powerdomain operations is being reused here. Signed-off-by: Ambresh K Signed-off-by: Afzal Mohammed --- arch/arm/mach-omap2/powerdomain.h | 1 + arch/arm/mach-omap2/powerdomains43xx_data.c | 145 +++++++++++++++++++++++++++ 2 files changed, 146 insertions(+) create mode 100644 arch/arm/mach-omap2/powerdomains43xx_data.c diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index e4d7bd6..56ad9f5 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h @@ -254,6 +254,7 @@ extern void omap242x_powerdomains_init(void); extern void omap243x_powerdomains_init(void); extern void omap3xxx_powerdomains_init(void); extern void am33xx_powerdomains_init(void); +extern void am43xx_powerdomains_init(void); extern void omap44xx_powerdomains_init(void); extern void omap54xx_powerdomains_init(void); diff --git a/arch/arm/mach-omap2/powerdomains43xx_data.c b/arch/arm/mach-omap2/powerdomains43xx_data.c new file mode 100644 index 0000000..45e4363 --- /dev/null +++ b/arch/arm/mach-omap2/powerdomains43xx_data.c @@ -0,0 +1,145 @@ +/* + * AM43xx Power domains framework + * + * Copyright (C) 2013 Texas Instruments, Inc. + * + * This file is made by modifying the file generated automatically + * from the OMAP hardware databases. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include + +#include "powerdomain.h" + +#include "prcm-common.h" +#include "prcm44xx.h" +#include "prcm43xx.h" + +static struct powerdomain gfx_43xx_pwrdm = { + .name = "gfx_pwrdm", + .voltdm = { .name = "core" }, + .prcm_offs = AM43XX_PRM_GFX_INST, + .prcm_partition = AM43XX_PRM_PARTITION, + .pwrsts = PWRSTS_OFF_ON, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRSTS_OFF_RET, /* gfx_mem */ + }, + .pwrsts_mem_on = { + [0] = PWRSTS_ON, /* gfx_mem */ + }, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, +}; + +static struct powerdomain mpu_43xx_pwrdm = { + .name = "mpu_pwrdm", + .voltdm = { .name = "mpu" }, + .prcm_offs = AM43XX_PRM_MPU_INST, + .prcm_partition = AM43XX_PRM_PARTITION, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRSTS_OFF_RET, + .banks = 3, + .pwrsts_mem_ret = { + [0] = PWRSTS_OFF_RET, /* mpu_l1 */ + [1] = PWRSTS_OFF_RET, /* mpu_l2 */ + [2] = PWRSTS_OFF_RET, /* mpu_ram */ + }, + .pwrsts_mem_on = { + [0] = PWRSTS_ON, /* mpu_l1 */ + [1] = PWRSTS_ON, /* mpu_l2 */ + [2] = PWRSTS_ON, /* mpu_ram */ + }, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, +}; + +static struct powerdomain rtc_43xx_pwrdm = { + .name = "rtc_pwrdm", + .voltdm = { .name = "rtc" }, + .prcm_offs = AM43XX_PRM_RTC_INST, + .prcm_partition = AM43XX_PRM_PARTITION, + .pwrsts = PWRSTS_ON, +}; + +static struct powerdomain wkup_43xx_pwrdm = { + .name = "wkup_pwrdm", + .voltdm = { .name = "core" }, + .prcm_offs = AM43XX_PRM_WKUP_INST, + .prcm_partition = AM43XX_PRM_PARTITION, + .pwrsts = PWRSTS_ON, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRSTS_OFF, /* debugss_mem */ + }, + .pwrsts_mem_on = { + [0] = PWRSTS_ON, /* debugss_mem */ + }, +}; + +static struct powerdomain tamper_43xx_pwrdm = { + .name = "tamper_pwrdm", + .voltdm = { .name = "tamper" }, + .prcm_offs = AM43XX_PRM_TAMPER_INST, + .prcm_partition = AM43XX_PRM_PARTITION, + .pwrsts = PWRSTS_ON, +}; + +static struct powerdomain cefuse_43xx_pwrdm = { + .name = "cefuse_pwrdm", + .voltdm = { .name = "core" }, + .prcm_offs = AM43XX_PRM_CEFUSE_INST, + .prcm_partition = AM43XX_PRM_PARTITION, + .pwrsts = PWRSTS_OFF_ON, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, +}; + +static struct powerdomain per_43xx_pwrdm = { + .name = "per_pwrdm", + .voltdm = { .name = "core" }, + .prcm_offs = AM43XX_PRM_PER_INST, + .prcm_partition = AM43XX_PRM_PARTITION, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRSTS_OFF_RET, + .banks = 4, + .pwrsts_mem_ret = { + [0] = PWRSTS_OFF_RET, /* icss_mem */ + [1] = PWRSTS_OFF_RET, /* per_mem */ + [2] = PWRSTS_OFF_RET, /* ram1_mem */ + [3] = PWRSTS_OFF_RET, /* ram2_mem */ + }, + .pwrsts_mem_on = { + [0] = PWRSTS_OFF_RET, /* icss_mem */ + [1] = PWRSTS_ON, /* per_mem */ + [2] = PWRSTS_OFF_RET, /* ram1_mem */ + [3] = PWRSTS_OFF_RET, /* ram2_mem */ + }, + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, +}; + +static struct powerdomain *powerdomains_am43xx[] __initdata = { + &gfx_43xx_pwrdm, + &mpu_43xx_pwrdm, + &rtc_43xx_pwrdm, + &wkup_43xx_pwrdm, + &tamper_43xx_pwrdm, + &cefuse_43xx_pwrdm, + &per_43xx_pwrdm, + NULL +}; + +static int am43xx_check_vcvp(void) +{ + return 0; +} + +void __init am43xx_powerdomains_init(void) +{ + omap4_pwrdm_operations.pwrdm_has_voltdm = am43xx_check_vcvp; + pwrdm_register_platform_funcs(&omap4_pwrdm_operations); + pwrdm_register_pwrdms(powerdomains_am43xx); + pwrdm_complete_init(); +}