| Message ID | 9045da6f-88e5-4a20-be68-477790588131@TX2EHSMHS023.ehs.local (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
From: Srikanth Thokala <srikanth.thokala@xilinx.com> Date: Thu, 28 Nov 2013 12:59:57 +0530 > This patch adds barriers at appropriate places to ensure the driver > works on Xilinx Zynq ARM-based SoC platform. > > Signed-off-by: Srikanth Thokala <sthokal@xilinx.com> Memory barriers must have comments. Specifically, the comment must describe what exactly is being ensured by the memory barrier. What entity must see what memory operations in what order?
Hi David, > -----Original Message----- > From: David Miller [mailto:davem@davemloft.net] > Sent: Monday, December 02, 2013 6:39 AM > To: Srikanth Thokala > Cc: netdev@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Michal > Simek; Srikanth Thokala > Subject: Re: [PATCH 2/2] net: emaclite: add barriers to support Xilinx Zynq > platform > > From: Srikanth Thokala <srikanth.thokala@xilinx.com> > Date: Thu, 28 Nov 2013 12:59:57 +0530 > > > This patch adds barriers at appropriate places to ensure the driver > > works on Xilinx Zynq ARM-based SoC platform. > > > > Signed-off-by: Srikanth Thokala <sthokal@xilinx.com> > > Memory barriers must have comments. > > Specifically, the comment must describe what exactly is being ensured by the > memory barrier. What entity must see what memory operations in what order? Ok. I will update and send you v2. Thanks Srikanth This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c index 3a693a1..31b8b6c 100644 --- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c +++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c @@ -220,6 +220,7 @@ static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr, to_u16_ptr = (u16 *)&align_buffer; *to_u16_ptr++ = *from_u16_ptr++; *to_u16_ptr++ = *from_u16_ptr++; + wmb(); /* Output a word */ *to_u32_ptr++ = align_buffer; @@ -236,6 +237,7 @@ static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr, for (; length > 0; length--) *to_u8_ptr++ = *from_u8_ptr++; + wmb(); *to_u32_ptr = align_buffer; } }
This patch adds barriers at appropriate places to ensure the driver works on Xilinx Zynq ARM-based SoC platform. Signed-off-by: Srikanth Thokala <sthokal@xilinx.com> --- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 2 ++ 1 file changed, 2 insertions(+)