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AJvYcCX1KDDDMciQD0oPaPdsbYIjxnJ/8k1V04+VLn8oivG3PidNLKt/VSX+enZrzyEQ2Cnvw+FuGMsPcdgEuzBRCh7I@lists.infradead.org X-Gm-Message-State: AOJu0YyOYIlLtbsvwGFF2ibyXbXebkLysThTzF9x594aQM5gKg3kiGLV TBDcJI+0ZzjaGknjlqAtqf7i8cox9FBk/Houaq4ur4v3iKmTMUphBZE/oRt0cqkki7obtBQBT3b 3FJdjK/0nlQ== X-Google-Smtp-Source: AGHT+IFn9sa16Ybx9bMnT3j8/6v7ZyNcSwDP48OOodsufyBW3mKo0tvoS5jljQA1jigXnWx+/SHMhWvEv0+uPw== X-Received: from pfbc2.prod.google.com ([2002:a05:6a00:ad02:b0:725:eeaa:65e2]) (user=yepeilin job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a21:7896:b0:1e0:d9a0:4ff7 with SMTP id adf61e73a8af0-1e5e08011d6mr82625682637.32.1735869887482; Thu, 02 Jan 2025 18:04:47 -0800 (PST) Date: Fri, 3 Jan 2025 02:04:18 +0000 In-Reply-To: Mime-Version: 1.0 References: X-Mailer: git-send-email 2.47.1.613.gc27f4b7a9f-goog Message-ID: <9ad3034a62361d91a99af24efa03f48c4c9e13ea.1735868489.git.yepeilin@google.com> Subject: [PATCH bpf-next v2 3/3] bpf, arm64: Emit A64_{ADD,SUB}_I when possible in emit_{lse,ll_sc}_atomic() From: Peilin Ye To: bpf@vger.kernel.org Cc: Peilin Ye , Xu Kuohai , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Martin KaFai Lau , Eduard Zingerman , Song Liu , Yonghong Song , John Fastabend , KP Singh , Stanislav Fomichev , Hao Luo , Jiri Olsa , Puranjay Mohan , Catalin Marinas , Will Deacon , Josh Don , Barret Rhoden , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250102_180448_965680_5DA5356B X-CRM114-Status: GOOD ( 14.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currently in emit_{lse,ll_sc}_atomic(), if there is an offset, we add it to the base address by doing e.g.: if (off) { emit_a64_mov_i(1, tmp, off, ctx); emit(A64_ADD(1, tmp, tmp, dst), ctx); ... As pointed out by Xu, we can use emit_a64_add_i() (added in the previous patch) instead, which tries to combine the above into a single A64_ADD_I or A64_SUB_I when possible. Suggested-by: Xu Kuohai Signed-off-by: Peilin Ye --- change in v2: * move the logic into a helper (added in v2 2/3) and use it (Xu) v1: https://lore.kernel.org/bpf/953c7241e82496cb7a8b5a8724028ad646cd0896.1735342016.git.yepeilin@google.com/ arch/arm64/net/bpf_jit_comp.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm64/net/bpf_jit_comp.c b/arch/arm64/net/bpf_jit_comp.c index 8ee9528d8795..8446848edddb 100644 --- a/arch/arm64/net/bpf_jit_comp.c +++ b/arch/arm64/net/bpf_jit_comp.c @@ -662,8 +662,7 @@ static int emit_lse_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx) u8 reg = dst; if (off) { - emit_a64_mov_i(1, tmp, off, ctx); - emit(A64_ADD(1, tmp, tmp, dst), ctx); + emit_a64_add_i(1, tmp, reg, tmp, off, ctx); reg = tmp; } if (arena) { @@ -734,7 +733,7 @@ static int emit_ll_sc_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx) const s32 imm = insn->imm; const s16 off = insn->off; const bool isdw = BPF_SIZE(code) == BPF_DW; - u8 reg; + u8 reg = dst; s32 jmp_offset; if (BPF_MODE(code) == BPF_PROBE_ATOMIC) { @@ -743,11 +742,8 @@ static int emit_ll_sc_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx) return -EINVAL; } - if (!off) { - reg = dst; - } else { - emit_a64_mov_i(1, tmp, off, ctx); - emit(A64_ADD(1, tmp, tmp, dst), ctx); + if (off) { + emit_a64_add_i(1, tmp, reg, tmp, off, ctx); reg = tmp; }