From patchwork Fri Jul 7 12:03:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pratyush Anand X-Patchwork-Id: 9829987 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 07DB1602CA for ; Fri, 7 Jul 2017 12:05:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EB83D2858E for ; Fri, 7 Jul 2017 12:05:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DFC6428639; Fri, 7 Jul 2017 12:05:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.4 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_SORBS_SPAM autolearn=no version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 782052858E for ; Fri, 7 Jul 2017 12:05:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=z+dzT7WOVP4SSDRMhrLZtgo3vBW8y+ZECnCim2WfJzk=; b=UaqVOb1w38PFyBcDk0Ov5tB8on fIt3c9TH2J7pQzPBBIQSgWe+fX8NaDuVmh45isYZ2ge2DrdhJiXyYPfvxSSYEMXfBGcGOEVaMmhQ1 hKyphVYDac5Wavlgq5h5RAacnroMuUXeM7WRwH3XSohsALQ6bIv7J/XwgA/lbsYbpFA0EARZLkeCY WwVe7ik1pERvvy8UtmxzsjGZQA3tIIrCc8CTG9yOv6KxHBFyilxa7wZ+ykXLOzqkzGthZWEalNp5S /u6rAPgUKNJ6hmlE+GqZdeNlMc02Pivy0KZZWUNSmIQf0rrGXuAxFkxqVFvt9A+LxshdpZp3eReCF W7xNLm3w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dTS0s-0003ju-8j; Fri, 07 Jul 2017 12:05:34 +0000 Received: from mail-pg0-f45.google.com ([74.125.83.45]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dTS0h-0002Rd-A9 for linux-arm-kernel@lists.infradead.org; Fri, 07 Jul 2017 12:05:24 +0000 Received: by mail-pg0-f45.google.com with SMTP id k14so16435203pgr.0 for ; Fri, 07 Jul 2017 05:05:02 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=xEO1ZhDCmuDXM+q6tudQ5EolZIKPkFfWThw9l+KS414=; b=t/mbiAbtX0M0w+csJ/+jnmA12g30YPzPzvRiLynUnkMSdOiK6LD879s5ysnOE0Kae2 m9QhfKpwpg1p26JDaNHsv0ciT7rW8Qdx0BkpwuATofxUjW7ZmQ/kZOQ3rqjUE6aRu7zd mTMjnq2fSf5TbFzfz3ucj7/99gbM8pK9O4LvbE1dvnooRK5h+QSf76kLflcFjQWxrtlN mQF6aa0/OxszQzLUyCb1mDFQwfafFpxcxiHyhGLXjatNJQfxiM0VMim6yXAUOkrZBlUD sXuvkvEPlisDVaklKOxfZ++pS6TQFOKkrfjXttRF6QLqTM5Vh9pWUKWppSBDxsrndO9h mTZA== X-Gm-Message-State: AIVw111YImxuNSQbvcw9y43j1U4imAOsK8LYVwe9s76myl72Jrdjdhyo EVRJlGJgaEtxd4butGZ9cg== X-Received: by 10.84.230.134 with SMTP id e6mr2625551plk.256.1499429102293; Fri, 07 Jul 2017 05:05:02 -0700 (PDT) Received: from localhost ([182.64.124.31]) by smtp.gmail.com with ESMTPSA id o62sm5515980pfg.120.2017.07.07.05.05.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 07 Jul 2017 05:05:01 -0700 (PDT) From: Pratyush Anand To: linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin Subject: [PATCH V2 1/4] hw_breakpoint: Add step_needed event attribute Date: Fri, 7 Jul 2017 17:33:57 +0530 Message-Id: <9d4f76f3a0bffe93a6d5146c9b53ee7b985f22da.1499416107.git.panand@redhat.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170707_050523_376142_73456C6A X-CRM114-Status: GOOD ( 12.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Pratyush Anand , will.deacon@arm.com, linux-kernel@vger.kernel.org, huawei.libin@huawei.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Architecture like ARM64 currently allows to use default hw breakpoint single step handler only to perf. However, some other users like few systemtap tests or kernel test in samples/hw_breakpoint/data_breakpoint.c can also work with default step handler implementation. At the same time, some other like GDB/ptrace may implement their own step handler. Therefore, this patch introduces a new perf_event_attr bit field, so that arch specific code(specially on arm64) can make a decision to enable single stepping. Any architecture which is not using this field will not have any side effect. Signed-off-by: Pratyush Anand --- include/linux/hw_breakpoint.h | 6 ++++++ include/uapi/linux/perf_event.h | 3 ++- kernel/events/core.c | 2 ++ tools/include/uapi/linux/perf_event.h | 3 ++- 4 files changed, 12 insertions(+), 2 deletions(-) diff --git a/include/linux/hw_breakpoint.h b/include/linux/hw_breakpoint.h index 0464c85e63fd..6173ae048cbc 100644 --- a/include/linux/hw_breakpoint.h +++ b/include/linux/hw_breakpoint.h @@ -38,6 +38,12 @@ static inline int hw_breakpoint_type(struct perf_event *bp) return bp->attr.bp_type; } +static inline bool +hw_breakpoint_needs_single_step(struct perf_event *bp) +{ + return bp->attr.step_needed; +} + static inline unsigned long hw_breakpoint_len(struct perf_event *bp) { return bp->attr.bp_len; diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h index b1c0b187acfe..00935808de0d 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -345,7 +345,8 @@ struct perf_event_attr { context_switch : 1, /* context switch data */ write_backward : 1, /* Write ring buffer from end to beginning */ namespaces : 1, /* include namespaces data */ - __reserved_1 : 35; + step_needed : 1, /* Use arch step handler */ + __reserved_1 : 34; union { __u32 wakeup_events; /* wakeup every n events */ diff --git a/kernel/events/core.c b/kernel/events/core.c index 6c4e523dc1e2..220e26941475 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -9444,9 +9444,11 @@ perf_event_alloc(struct perf_event_attr *attr, int cpu, } else if (is_write_backward(event)){ event->overflow_handler = perf_event_output_backward; event->overflow_handler_context = NULL; + event->attr.step_needed = 1; } else { event->overflow_handler = perf_event_output_forward; event->overflow_handler_context = NULL; + event->attr.step_needed = 1; } perf_event__state_init(event); diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/linux/perf_event.h index b1c0b187acfe..00935808de0d 100644 --- a/tools/include/uapi/linux/perf_event.h +++ b/tools/include/uapi/linux/perf_event.h @@ -345,7 +345,8 @@ struct perf_event_attr { context_switch : 1, /* context switch data */ write_backward : 1, /* Write ring buffer from end to beginning */ namespaces : 1, /* include namespaces data */ - __reserved_1 : 35; + step_needed : 1, /* Use arch step handler */ + __reserved_1 : 34; union { __u32 wakeup_events; /* wakeup every n events */