From patchwork Thu Nov 9 07:46:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abbott Liu X-Patchwork-Id: 10050337 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DB70D601EA for ; Thu, 9 Nov 2017 07:49:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CBB002AB68 for ; Thu, 9 Nov 2017 07:49:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BE23D2AB6C; Thu, 9 Nov 2017 07:49:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 12EDA2AB68 for ; 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Thu, 09 Nov 2017 07:49:52 +0000 Received: from szxga03-in.huawei.com ([45.249.212.189]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1eChau-000396-9x for linux-arm-kernel@lists.infradead.org; Thu, 09 Nov 2017 07:49:51 +0000 Received: from 172.30.72.53 (EHLO DGGEMM405-HUB.china.huawei.com) ([172.30.72.53]) by dggrg03-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id AYK58728; Thu, 09 Nov 2017 15:46:51 +0800 (CST) Received: from DGGEMM510-MBS.china.huawei.com ([169.254.11.85]) by DGGEMM405-HUB.china.huawei.com ([10.3.20.213]) with mapi id 14.03.0361.001; Thu, 9 Nov 2017 15:46:39 +0800 From: "Liuwenliang (Abbott Liu)" To: Marc Zyngier , "linux@armlinux.org.uk" , "aryabinin@virtuozzo.com" , "afzal.mohd.ma@gmail.com" , "f.fainelli@gmail.com" , "labbott@redhat.com" , "kirill.shutemov@linux.intel.com" , "mhocko@suse.com" , "cdall@linaro.org" , "catalin.marinas@arm.com" , "akpm@linux-foundation.org" , "mawilcox@microsoft.com" , "tglx@linutronix.de" , "thgarnie@google.com" , "keescook@chromium.org" , "arnd@arndb.de" , "vladimir.murzin@arm.com" , "tixy@linaro.org" , "ard.biesheuvel@linaro.org" , "robin.murphy@arm.com" , "mingo@kernel.org" , "grygorii.strashko@linaro.org" Subject: Re: [PATCH 01/11] Initialize the mapping of KASan shadow memory Thread-Topic: [PATCH 01/11] Initialize the mapping of KASan shadow memory Thread-Index: AQHTQmokZ5ece1W6v0+GfMCIss4ZwaLfVPOAgCx4V5A= Date: Thu, 9 Nov 2017 07:46:39 +0000 Message-ID: References: <20171011082227.20546-1-liuwenliang@huawei.com> <20171011082227.20546-2-liuwenliang@huawei.com> <227e2c6e-f479-849d-8942-1d5ff4ccd440@arm.com> In-Reply-To: <227e2c6e-f479-849d-8942-1d5ff4ccd440@arm.com> Accept-Language: en-US Content-Language: zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.57.90.243] MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090201.5A0407EC.0357, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=169.254.11.85, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 656b33ec11cc64de7e525d8b592277a7 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171108_234949_159180_16B646AF X-CRM114-Status: GOOD ( 11.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "opendmb@gmail.com" , "linux-kernel@vger.kernel.org" , "kasan-dev@googlegroups.com" , Zengweilin , "linux-mm@kvack.org" , Dailei , "glider@google.com" , "dvyukov@google.com" , Jiazhenghua , "linux-arm-kernel@lists.infradead.org" , Heshaoliang Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On 12/10/17 15:59, Marc Zyngier [mailto:marc.zyngier@arm.com] wrote: > On 11/10/17 09:22, Abbott Liu wrote: >> diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h >> index f2e1af4..6e26714 100644 >> --- a/arch/arm/include/asm/proc-fns.h >> +++ b/arch/arm/include/asm/proc-fns.h >> @@ -131,6 +131,15 @@ extern void cpu_resume(void); >> pg &= ~(PTRS_PER_PGD*sizeof(pgd_t)-1); \ >> (pgd_t *)phys_to_virt(pg); \ >> }) >> + >> +#define cpu_set_ttbr0(val) \ >> + do { \ >> + u64 ttbr = val; \ >> + __asm__("mcrr p15, 0, %Q0, %R0, c2" \ >> + : : "r" (ttbr)); \ >> + } while (0) >> + >> + >> #else >> #define cpu_get_pgd() \ >> ({ \ >> @@ -140,6 +149,30 @@ extern void cpu_resume(void); >> pg &= ~0x3fff; \ >> (pgd_t *)phys_to_virt(pg); \ >> }) >> + >> +#define cpu_set_ttbr(nr, val) \ >> + do { \ >> + u64 ttbr = val; \ >> + __asm__("mcr p15, 0, %0, c2, c0, 0" \ >> + : : "r" (ttbr)); \ >> + } while (0) >> + >> +#define cpu_get_ttbr(nr) \ >> + ({ \ >> + unsigned long ttbr; \ >> + __asm__("mrc p15, 0, %0, c2, c0, 0" \ >> + : "=r" (ttbr)); \ >> + ttbr; \ >> + }) >> + >> +#define cpu_set_ttbr0(val) \ >> + do { \ >> + u64 ttbr = val; \ >> + __asm__("mcr p15, 0, %0, c2, c0, 0" \ >> + : : "r" (ttbr)); \ >> + } while (0) >> + >> + > >You could instead lift and extend the definitions provided in kvm_hyp.h, >and use the read_sysreg/write_sysreg helpers defined in cp15.h. Thanks for your review. I extend definitions of TTBR0/TTBR1/PAR in kvm_hyp.h when the CONFIG_ARM_LPAE is not defined. Because cortex A9 don't support virtualization, so use CONFIG_ARM_LPAE to exclude some functions and macros which are only used in virtualization. Here is the code which I tested on vexpress_a15 and vexpress_a9: diff --git a/arch/arm/include/asm/kvm_hyp.h b/arch/arm/include/asm/kvm_hyp.h index 14b5903..2592608 100644 --- a/arch/arm/include/asm/kvm_hyp.h +++ b/arch/arm/include/asm/kvm_hyp.h @@ -19,12 +19,14 @@ #define __ARM_KVM_HYP_H__ #include -#include #include + +#ifdef CONFIG_ARM_LPAE +#include #include #include - #define __hyp_text __section(.hyp.text) notrace +#endif #define __ACCESS_VFP(CRn) \ "mrc", "mcr", __stringify(p10, 7, %0, CRn, cr0, 0), u32 @@ -37,12 +39,18 @@ __val; \ }) +#ifdef CONFIG_ARM_LPAE #define TTBR0 __ACCESS_CP15_64(0, c2) #define TTBR1 __ACCESS_CP15_64(1, c2) #define VTTBR __ACCESS_CP15_64(6, c2) #define PAR __ACCESS_CP15_64(0, c7) #define CNTV_CVAL __ACCESS_CP15_64(3, c14) #define CNTVOFF __ACCESS_CP15_64(4, c14) +#else +#define TTBR0 __ACCESS_CP15(c2, 0, c0, 0) +#define TTBR1 __ACCESS_CP15(c2, 0, c0, 1) +#define PAR __ACCESS_CP15(c7, 0, c4, 0) +#endif #define MIDR __ACCESS_CP15(c0, 0, c0, 0) #define CSSELR __ACCESS_CP15(c0, 2, c0, 0) @@ -98,6 +106,7 @@ #define cntvoff_el2 CNTVOFF #define cnthctl_el2 CNTHCTL +#ifdef CONFIG_ARM_LPAE void __timer_save_state(struct kvm_vcpu *vcpu); void __timer_restore_state(struct kvm_vcpu *vcpu); @@ -123,5 +132,6 @@ void __hyp_text __banked_restore_state(struct kvm_cpu_context *ctxt); asmlinkage int __guest_enter(struct kvm_vcpu *vcpu, struct kvm_cpu_context *host); asmlinkage int __hyp_do_panic(const char *, int, u32); +#endif #endif /* __ARM_KVM_HYP_H__ */ diff --git a/arch/arm/mm/kasan_init.c b/arch/arm/mm/kasan_init.c index 049ee0a..359a782 100644 --- a/arch/arm/mm/kasan_init.c +++ b/arch/arm/mm/kasan_init.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include "mm.h" @@ -203,16 +204,16 @@ void __init kasan_init(void) u64 orig_ttbr0; int i; - orig_ttbr0 = cpu_get_ttbr(0); + orig_ttbr0 = read_sysreg(TTBR0); #ifdef CONFIG_ARM_LPAE memcpy(tmp_pmd_table, pgd_page_vaddr(*pgd_offset_k(KASAN_SHADOW_START)), sizeof(tmp_pmd_table)); memcpy(tmp_page_table, swapper_pg_dir, sizeof(tmp_page_table)); set_pgd(&tmp_page_table[pgd_index(KASAN_SHADOW_START)], __pgd(__pa(tmp_pmd_table) | PMD_TYPE_TABLE | L_PGD_SWAPPER)); - cpu_set_ttbr0(__pa(tmp_page_table)); + write_sysreg(__pa(tmp_page_table), TTBR0); #else memcpy(tmp_page_table, swapper_pg_dir, sizeof(tmp_page_table)); - cpu_set_ttbr0(__pa(tmp_page_table)); + write_sysreg(__pa(tmp_page_table),TTBR0); #endif flush_cache_all(); local_flush_bp_all(); @@ -257,7 +258,7 @@ void __init kasan_init(void) /*__pgprot(_L_PTE_DEFAULT | L_PTE_DIRTY | L_PTE_XN | L_PTE_RDONLY))*/ __pgprot(pgprot_val(PAGE_KERNEL) | L_PTE_RDONLY))); memset(kasan_zero_page, 0, PAGE_SIZE); - cpu_set_ttbr0(orig_ttbr0); + write_sysreg(orig_ttbr0 ,TTBR0); flush_cache_all(); local_flush_bp_all(); local_flush_tlb_all();