From patchwork Fri Dec 6 12:39:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Harro Haan X-Patchwork-Id: 3295511 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id EB4F5C0D4A for ; Fri, 6 Dec 2013 12:40:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2C40020435 for ; Fri, 6 Dec 2013 12:39:56 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B5F9920454 for ; Fri, 6 Dec 2013 12:39:54 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vouh4-0003wN-PG; Fri, 06 Dec 2013 12:39:42 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vouh2-0003eD-6Z; Fri, 06 Dec 2013 12:39:40 +0000 Received: from mail-oa0-f53.google.com ([209.85.219.53]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Vougy-0003dV-Dy for linux-arm-kernel@lists.infradead.org; Fri, 06 Dec 2013 12:39:37 +0000 Received: by mail-oa0-f53.google.com with SMTP id m1so688842oag.12 for ; Fri, 06 Dec 2013 04:39:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=gXXs5IYmj87fLAHbG6ydvK7qouK7Hyes9ZsNkwkAugc=; b=Uid+tRXuVyowqRkLLRvnerVO3FDw+Z/nJHmLYhmjcjY7YfgWWx4eqGPoTRMwGXuQZP kfEWsjU9L1KKsaGhL6US+9TbyvN7UHImk8B9zyJHZmopDeK6qEIqtG3zzwuTcmKt6Oc/ YoG6Lla+Rd1mdZ/ztroJ+W9akb+snVUOQcprK5rrbH+VcV9D8kenDZ8zzRtLhaP7GzoQ VYMGSc78SDB8Y1nudE+6DWE4a6yB9ZtdeAjnnLl5YuGWI/Nauav/Wx0V8gSc0oeQg3WK 6ElsPR8VKw7fglEV6oGsnqaxj+uhX6okwhAceWNOGktkzgjta0fBYuqtokbVlAAg/nN1 BNSQ== MIME-Version: 1.0 X-Received: by 10.60.63.141 with SMTP id g13mr2355818oes.60.1386333549667; Fri, 06 Dec 2013 04:39:09 -0800 (PST) Received: by 10.76.5.233 with HTTP; Fri, 6 Dec 2013 04:39:09 -0800 (PST) In-Reply-To: <201312061243.56069.marex@denx.de> References: <201312061032.31944.jbe@pengutronix.de> <201312061243.56069.marex@denx.de> Date: Fri, 6 Dec 2013 13:39:09 +0100 Message-ID: Subject: Re: i.MX6/PCIe and MSI interrupts From: Harro Haan To: Marek Vasut X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131206_073936_565783_399D42D6 X-CRM114-Status: GOOD ( 34.39 ) X-Spam-Score: -2.7 (--) Cc: Richard Zhu , linux-arm-kernel@lists.infradead.org, Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 6 December 2013 12:43, Marek Vasut wrote: > On Friday, December 06, 2013 at 10:32:31 AM, Jürgen Beisert wrote: >> Hi, >> >> is anybody out there who has MSI interrupts successfully working on i.MX6? >> I tried with my i.MX6 and a Gbit network card but without success. In >> legacy interrupt mode it works. > > What precise model of card do you use ? Do you have a PCIe switch in the path or > just direct RC-EP connection ? > >> I'm using various patches here from the list and the PCIe itself works. The >> designware driver is prepared for MSI interrupts and the Exynos driver >> makes use of it. > > OK > >> I added the same glue code to the i.MX6 driver but I can't get the INTD >> interrupt to fire when MSI arrives (while the INTA fires in legacy >> interrupt mode). Some idea what needs to be done in the i.MX6 to get MSI >> working? The Exynos driver additionally changes some bits in its chipset >> beside the PCIe unit to enable the MSI interrupt to its CPU. Are there >> some 'hidden' bits in the i.MX6 as well? > > Can you post your prototype patch for the PCIe MSI so we can see what you did > there please? Attached are my patches of the first attempt to get MSI working for the i.MX6. It looks like MSI is working but MSIX is not in combination with e1000e and SabreSD. I did some successful iperf tests in MSI mode. I did the following hack in drivers/net/ethernet/intel/e1000e/param.c to disable MSIX: - if (adapter->flags & FLAG_HAS_MSIX) { + if (!(adapter->flags & FLAG_HAS_MSIX)/*TEMP*/) { In MSIX mode, the imx6_pcie_msi_irq_handler occurs, but e1000_intr_msix_rx, e1000_intr_msix_tx or e1000_intr_msix_other does not get called. My MSI tests are not successful when testing it with a Xilinx PCIe development board, while this FPGA design works properly with FSL imx_3.0.35 (or on x86). Best regards, Harro From 0768eeafd5a6299e4c8d88af87dacad9d9582dc4 Mon Sep 17 00:00:00 2001 From: Harro Haan Date: Thu, 5 Dec 2013 14:06:37 +0100 Subject: [PATCH 2/2] PCI: imx6: add support for MSI This patch adds support for Message Signaled Interrupt in the imx6q-pcie driver. It is done in a similar way as for the Exynos PCIe driver (commit f342d940ee0e3a2b5197fd4fbade1cb6bbc960b7), which is also using the Synopsys designware PCIe IP core. Signed-off-by: Harro Haan --- drivers/pci/host/pci-imx6.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index bd70af8..b548d38 100644 --- a/drivers/pci/host/pci-imx6.c +++ b/drivers/pci/host/pci-imx6.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -328,6 +329,9 @@ static void imx6_pcie_host_init(struct pcie_port *pp) } } + if (IS_ENABLED(CONFIG_PCI_MSI)) + dw_pcie_msi_init(pp); + return; } @@ -382,6 +386,15 @@ static struct pcie_host_ops imx6_pcie_host_ops = { .host_init = imx6_pcie_host_init, }; +static irqreturn_t imx6_pcie_msi_irq_handler(int irq, void *arg) +{ + struct pcie_port *pp = arg; + + dw_handle_msi_irq(pp); + + return IRQ_HANDLED; +} + static int imx6_add_pcie_port(struct pcie_port *pp, struct platform_device *pdev) { @@ -393,6 +406,22 @@ static int imx6_add_pcie_port(struct pcie_port *pp, return -ENODEV; } + if (IS_ENABLED(CONFIG_PCI_MSI)) { + pp->msi_irq = platform_get_irq(pdev, 1); + if (!pp->msi_irq) { + dev_err(&pdev->dev, "failed to get msi irq\n"); + return -ENODEV; + } + + ret = devm_request_irq(&pdev->dev, pp->msi_irq, + imx6_pcie_msi_irq_handler, + IRQF_SHARED, "imx6q-pcie", pp); + if (ret) { + dev_err(&pdev->dev, "failed to request msi irq\n"); + return ret; + } + } + pp->root_bus_nr = -1; pp->ops = &imx6_pcie_host_ops; -- 1.7.9.5