From patchwork Sat May 4 08:21:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Lei X-Patchwork-Id: 2520411 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id B845F3FD4E for ; Sat, 4 May 2013 08:22:00 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UYXjA-00057H-OS; Sat, 04 May 2013 08:21:56 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UYXj7-0005Wi-Tg; Sat, 04 May 2013 08:21:53 +0000 Received: from mail-ve0-x236.google.com ([2607:f8b0:400c:c01::236]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UYXj4-0005WM-Em for linux-arm-kernel@lists.infradead.org; Sat, 04 May 2013 08:21:51 +0000 Received: by mail-ve0-f182.google.com with SMTP id jx10so2152765veb.27 for ; Sat, 04 May 2013 01:21:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:x-received:in-reply-to:references:date:message-id :subject:from:to:cc:content-type; bh=Vixkwfd8yf0bSIqcPEn3P4RXecu40k0oGwN+1BJP6e8=; b=InDUOcO7bSgEjmNlX+5Bpak9wzthPvxvoWGthCJ88wYpSNBG0G+hQIpe3G7cgS7igI Mach9IlKp6tDQLGgvWrlDrSKmhYWr1gDb5h121DA0pHv8SPVsA//SzP7QDcQ9g5RCsaZ DXF8Jt7iEbAmSKSoVTkMuuQ3QxydNfH0ozVZzD6Ef82ns/9dlFU6+1vmGfftJmafJFdX zophpWntDtJfKmw2hyEMH2SN0/n6DhjIrTGY7mY9e/XyHVBkTMsjEfm3CUEqyofIylvW JKbpiIMryuUPOQ6y5dx1mmGOrqjBnM1akqjbYJm+1IluLycVnSbbvpPMYEfe62uk8dO2 mcqg== MIME-Version: 1.0 X-Received: by 10.220.200.66 with SMTP id ev2mr4576232vcb.70.1367655688000; Sat, 04 May 2013 01:21:28 -0700 (PDT) Received: by 10.220.241.210 with HTTP; Sat, 4 May 2013 01:21:27 -0700 (PDT) In-Reply-To: <20130503100242.GB29962@arm.com> References: <20130418112201.GQ14496@n2100.arm.linux.org.uk> <20130418114016.GG27197@titan.lakedaemon.net> <20130418135104.GA18616@arm.com> <20130421220629.GA25571@schnuecks.de> <20130430112225.GD29766@arm.com> <20130430210403.GA18076@schnuecks.de> <20130501142206.GB17387@arm.com> <20130501190441.GA22227@schnuecks.de> <20130502095431.GA20730@arm.com> <20130502193835.GA29144@schnuecks.de> <20130503100242.GB29962@arm.com> Date: Sat, 4 May 2013 16:21:27 +0800 Message-ID: Subject: Re: [PATCH V3 2/2] ARM: Handle user space mapped pages in flush_kernel_dcache_page From: Ming Lei To: Catalin Marinas X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130504_042150_597246_55B78BC2 X-CRM114-Status: GOOD ( 13.61 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (tom.leiming[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: "andrew@lunn.ch" , Russell King - ARM Linux , Simon Baatz , "linux-arm-kernel@lists.infradead.org" , Jason Cooper X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On Fri, May 3, 2013 at 6:02 PM, Catalin Marinas wrote: >> >> I assume that you inhibited the call to flush_dcache_page() in >> __get_user_pages() for anon pages. Otherwise, you will be flooded >> with warnings. > > I haven't done any stress testing so I don't think I hit this code path, > so no warning. But yes, it should have triggered. Anyway, in this case > flush_dcache_page() should have just ignored (clearing PG_arch_1 is > harmless anyway if we also ignore this bit in __sync_icache_dcache for > non-aliasing caches). Yes, maybe we can do a little optimization for O_DIRECT since no dcache alias and I/D coherency problem in this case on ARMv7, how about below change? Thanks, diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index 1c8f7f5..962a657 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c @@ -287,6 +287,8 @@ void flush_dcache_page(struct page *page) mapping && !mapping_mapped(mapping)) clear_bit(PG_dcache_clean, &page->flags); else { + if (!mapping && cache_is_vipt_nonaliasing()) + return; __flush_dcache_page(mapping, page); if (mapping && cache_is_vivt()) __flush_dcache_aliases(mapping, page);