From patchwork Thu Nov 15 13:51:50 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Fuzzey X-Patchwork-Id: 1749261 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id BAB613FC8A for ; Thu, 15 Nov 2012 13:53:54 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TYzrK-0007yH-0I; Thu, 15 Nov 2012 13:51:59 +0000 Received: from mail-oa0-f49.google.com ([209.85.219.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TYzrE-0007wE-M6 for linux-arm-kernel@lists.infradead.org; Thu, 15 Nov 2012 13:51:53 +0000 Received: by mail-oa0-f49.google.com with SMTP id l10so1532210oag.36 for ; Thu, 15 Nov 2012 05:51:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=KgXlKZHCozb5jE6j80GFFYnnn/Gj2U/kZzRiWRknYs8=; b=z5H7UYLoiGL2Igx5Qgt8PtjsagrNEzoagvkFaDX4GViTs19ZihiJ1qWkHkJMxocLIs 3kWU7Vh9Ho9X0H0JKGd4Axr5Fz1SN2PYyb4c2SoB/IgO968UDVOBrFyPI7ltqf+crMcP R4W00y5/c7YJdXEqKcdo1q3TS0QSglmXLCszaST3xcnA91yiigYcFpIHU5Dlz79b6Yb8 UcB+UCxy21m1bD5LVUGeteHR1O4TlQ+NM2xhsitQhzesKBnq0l6ZcZga1+oyYkbAOJw3 3x6rBBNX9Uaz/ddgv6jUqThOt2MacXsT2hrs59NyJw/K97hLb8IQGmDh8sbcsqakD+qM ZeDA== MIME-Version: 1.0 Received: by 10.182.132.112 with SMTP id ot16mr833594obb.69.1352987510309; Thu, 15 Nov 2012 05:51:50 -0800 (PST) Received: by 10.182.21.33 with HTTP; Thu, 15 Nov 2012 05:51:50 -0800 (PST) In-Reply-To: <20121115102525.GA16118@pengutronix.de> References: <1352894137-2050-1-git-send-email-m.grzeschik@pengutronix.de> <1352894137-2050-7-git-send-email-m.grzeschik@pengutronix.de> <20121115102525.GA16118@pengutronix.de> Date: Thu, 15 Nov 2012 14:51:50 +0100 Message-ID: Subject: Re: [PATCH 6/6] usb: chipidea: usbmisc: add post handling and errata fix for mx25 From: Martin Fuzzey To: Michael Grzeschik X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121115_085152_948748_AAAEAEF0 X-CRM114-Status: GOOD ( 14.66 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.219.49 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (mfuzzey[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: fabio.estevam@freescale.com, Michael Grzeschik , alexander.shishkin@linux.intel.com, gregkh@linuxfoundation.org, devicetree-discuss@lists.ozlabs.org, linux-usb@vger.kernel.org, mkl@pengutronix.de, kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org > This is because that series is based on Peter Chen's work. I should have > mentioned this in the cover-letter mail. You can merge his master branch > before adding my series: Ok thanks for the very rapid reply. I've now built this together with patch 2 "ci13xxx_imx: add 2nd and 3rd clock to support imx5x and newer" from your other series. But it hangs because the usb-phy clock is not being enabled. If I add a clock enable for that clock too to usbmisc_imx.c it works but that can't be the right way. Who is supposed to enable the phy clock? [I'm using the OTG port in host only mode on i.MX53 with "nop-usbphy"] Here's what I did (illustration only, probably white space broken): tmp_dev = (struct of_device_id *) of_match_device(usbmisc_imx_dt_ids, &pdev->dev); data->ops = (const struct usbmisc_ops *)tmp_dev->data; diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index cd6d7a0..2f0687a 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -492,6 +492,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk_register_clkdev(clk[usboh3_per_gate], "per", "53f80800.usbmisc"); clk_register_clkdev(clk[usboh3_gate], "ipg", "53f80800.usbmisc"); clk_register_clkdev(clk[usboh3_gate], "ahb", "53f80800.usbmisc"); + clk_register_clkdev(clk[usb_phy1_gate], "phy1", "53f80800.usbmisc"); // MF clk_register_clkdev(clk[esdhc1_ipg_gate], "ipg", "sdhci-esdhc-imx53.0"); clk_register_clkdev(clk[dummy], "ahb", "sdhci-esdhc-imx53.0"); clk_register_clkdev(clk[esdhc1_per_gate], "per", "sdhci-esdhc-imx53.0"); diff --git a/drivers/usb/chipidea/usbmisc_imx.c b/drivers/usb/chipidea/usbmisc_imx.c index acca109..a59093a 100644 --- a/drivers/usb/chipidea/usbmisc_imx.c +++ b/drivers/usb/chipidea/usbmisc_imx.c @@ -197,6 +197,24 @@ static int __devinit usbmisc_imx_probe(struct platform_device *pdev) if (ret) goto err_per_failed; + + { /* Temp Hack by MF awaiting reply on mailing list */ + struct clk *phy_clk; + + dev_info(&pdev->dev, "@MF@ hacking phy clock enable\n"); + phy_clk = devm_clk_get(&pdev->dev, "phy1"); + if (IS_ERR(phy_clk)) { + dev_err(&pdev->dev, "failed to get PHY clock, err=%ld\n", PTR_ERR(phy_clk)); + goto err_per_failed; + } + + ret = clk_prepare_enable(phy_clk); + if (ret) { + dev_err(&pdev->dev, "failed to enable PHY clock, err=%d\n", ret); + goto err_per_failed; + } + } +