From patchwork Wed Aug 14 18:54:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 2844747 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 46845BF546 for ; Wed, 14 Aug 2013 18:54:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3CFDD2065A for ; Wed, 14 Aug 2013 18:54:52 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2019520656 for ; Wed, 14 Aug 2013 18:54:51 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V9gDY-0005ev-6b; Wed, 14 Aug 2013 18:54:48 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V9gDV-0002uT-SG; Wed, 14 Aug 2013 18:54:45 +0000 Received: from mail-qa0-x232.google.com ([2607:f8b0:400d:c00::232]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V9gDS-0002tg-DZ for linux-arm-kernel@lists.infradead.org; Wed, 14 Aug 2013 18:54:43 +0000 Received: by mail-qa0-f50.google.com with SMTP id f14so1297663qak.9 for ; Wed, 14 Aug 2013 11:54:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=IUX9wRTqEkmXrYk+94dcHzgGfxkEIkDLjybK8ebMPXI=; b=yp5Q31rgvpHs/yMacyoG3gu2vcXZh/3Czlv9PJCBiYq5zhyq1/tj6l6ZeOXdxWgJP6 Mqo3os2QObZ/A9FWflUodduuvY7iu6+slrQm9M4gWjjLZHQMeqhdbPdw2QpUBJ/m0rl1 NUHdahMlKmV98ybJdOaz/HKgvoVa2IqKmxAEYqE1hhhEhrQ4YcFQJZDtqVYbTPRibfXL 9L6dv58OABKbfgvxqqlOINbN9sywdbGGlZYontZ5uW708mVGhmPOgrC8piLMFvmNvtJI mAA9WwGigYq/aFIl4Zy2ykKbSf285b5gU8hcud79yceKbaURRumfcR8jlqy7yJnGTyr0 OBLw== MIME-Version: 1.0 X-Received: by 10.224.46.202 with SMTP id k10mr13590890qaf.63.1376506460905; Wed, 14 Aug 2013 11:54:20 -0700 (PDT) Received: by 10.49.121.136 with HTTP; Wed, 14 Aug 2013 11:54:20 -0700 (PDT) In-Reply-To: <1376472125-23350-1-git-send-email-andre.przywara@calxeda.com> References: <1376472125-23350-1-git-send-email-andre.przywara@calxeda.com> Date: Wed, 14 Aug 2013 13:54:20 -0500 Message-ID: Subject: Re: [PATCH] KVM: ARM: ignore guest L2 cache control SMCs on Highbank and OMAP From: Rob Herring To: Andre Przywara X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130814_145442_565634_2DC7AC89 X-CRM114-Status: GOOD ( 20.88 ) X-Spam-Score: -1.8 (-) Cc: Rob Herring , "linux-arm-kernel@lists.infradead.org" , Christoffer Dall , kvmarm@lists.cs.columbia.edu X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Wed, Aug 14, 2013 at 4:22 AM, Andre Przywara wrote: > Guest kernels with CONFIG_L2X0 set (for instance Highbank or OMAP4) > will trigger SMCs to handle the L2 cache controller (PL310). > This will currently inject #UNDEFs and eventually stop the guest. > > We don't need explicit L2 cache controller handling on A15s anymore, > so it is safe to simply ignore these calls and proceed with the next > instruction. > > Signed-off-by: Andre Przywara > --- > arch/arm/kvm/handle_exit.c | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) At least for highbank, we can fix this in the kernel: > > diff --git a/arch/arm/kvm/handle_exit.c b/arch/arm/kvm/handle_exit.c > index df4c82d..2cbe6a0 100644 > --- a/arch/arm/kvm/handle_exit.c > +++ b/arch/arm/kvm/handle_exit.c > @@ -50,8 +50,28 @@ static int handle_hvc(struct kvm_vcpu *vcpu, struct kvm_run *run) > return 1; > } > > +/* > + * OMAP4 and Highbank machines do a SMC call to handle the L2 cache > + * controller. They put 0x102 in r12 to request this functionality. > + * This is not needed on A15s, so we can safely ignore it in KVM guests. > + */ > +static int kvm_ignore_l2x0_call(struct kvm_vcpu *vcpu) > +{ > + unsigned long fn_nr = *vcpu_reg(vcpu, 12) & ~((u32) 0); > + > + if (fn_nr == 0x102) { > + kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu)); > + return 1; > + } > + > + return 0; > +} > + > static int handle_smc(struct kvm_vcpu *vcpu, struct kvm_run *run) > { > + if (kvm_ignore_l2x0_call(vcpu)) > + return 1; > + > kvm_inject_undefined(vcpu); > return 1; > } > -- > 1.7.12.1 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index 1894dcf..b5d0375 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c @@ -77,8 +77,10 @@ static void __init highbank_init_irq(void) { irqchip_init(); - if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) - highbank_scu_map_io(); + if (!of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) + return; + + highbank_scu_map_io(); #ifdef CONFIG_CACHE_L2X0 /* Enable PL310 L2 Cache controller */