diff mbox

Kexec: BE kernel on ARM VE TC2

Message ID CALicx6ueLxCFCeun1grdtcC21HSkCDfenLWOSfuoSJnhx9GZ6w@mail.gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Vijay Kilari Aug. 5, 2013, 12:12 p.m. UTC
Hi Will,

I am trying to make kexec work on BE kernel on ARM VE TC2.

First, to make KEXEC work with SMP on ARM VE TC2 board,
I set nr_cpus=2 (i.e boot only A15's) this works with LE kernel.

However, I made below changes to make KEXEC work for BE kernel.
my question is: why delay is required for board to reboot with kexec?.
Is it platform issue?.

KEXEC_CONTROL_PAGE_SIZE);
@@ -165,6 +176,6 @@ void machine_kexec(struct kimage *image)

        if (kexec_reinit)
                kexec_reinit();
-
+       mdelay(500);
        soft_restart(reboot_code_buffer_phys);
 }


Thanks & Regards
Vijay

Comments

Ben Dooks Aug. 5, 2013, 3:28 p.m. UTC | #1
On 05/08/13 13:12, Vijay Kilari wrote:
> Hi Will,
>
> I am trying to make kexec work on BE kernel on ARM VE TC2.
>
> First, to make KEXEC work with SMP on ARM VE TC2 board,
> I set nr_cpus=2 (i.e boot only A15's) this works with LE kernel.
>
> However, I made below changes to make KEXEC work for BE kernel.
> my question is: why delay is required for board to reboot with kexec?.
> Is it platform issue?.
>
> diff --git a/arch/arm/kernel /machine_kexec.c b/arch/arm/kernel/machine_kexec.c
> index 4fb074c..0fb0ff9 100644
> --- a/arch/arm/kernel/machine_kexec.c
> +++ b/arch/arm/kernel/machine_kexec.c
> @@ -123,6 +123,18 @@ void machine_crash_shutdown(struct pt_regs *regs)
>          printk(KERN_INFO "Loading crashdump kernel...\n");
>   }
>
> +static void byte_copy_relocate_kernel(void *dst, const void *src, int size)
> +{
> +        char *d, *s;
> +        d = (char *) dst;
> +        s = (char *) src;
> +        while (size>  0)
> +        {
> +                *d++ = *s++;
> +                size--;
> +        }
> +}
> +
>   /*
>    * Function pointer to optional machine-specific reinitialization
>    */
> @@ -155,9 +167,8 @@ void machine_kexec(struct kimage *image)
>
>
>          /* copy our kernel relocation code to the control code page */
> -       memcpy(reboot_code_buffer,
> -              relocate_new_kernel, relocate_new_kernel_size);
> -
> +       byte_copy_relocate_kernel(reboot_code_buffer,
> +              relocate_new_kernel, relocate_new_kernel_size);

you should be able to use memcpy() here, as it shouldn't change the
endian-ness of the data being copied.
Will Deacon Aug. 8, 2013, 9:50 p.m. UTC | #2
On Mon, Aug 05, 2013 at 01:12:17PM +0100, Vijay Kilari wrote:
> Hi Will,
> 
> I am trying to make kexec work on BE kernel on ARM VE TC2.
> 
> First, to make KEXEC work with SMP on ARM VE TC2 board,
> I set nr_cpus=2 (i.e boot only A15's) this works with LE kernel.

Interesting, is this with a mainline kernel? I don't see how SMP kexec can
work on TC2 without additional patches to park the secondary cores safely.

Will
Vijay Kilari Aug. 12, 2013, 9:59 a.m. UTC | #3
On Fri, Aug 9, 2013 at 3:20 AM, Will Deacon <will.deacon@arm.com> wrote:
> On Mon, Aug 05, 2013 at 01:12:17PM +0100, Vijay Kilari wrote:
>> Hi Will,
>>
>> I am trying to make kexec work on BE kernel on ARM VE TC2.
>>
>> First, to make KEXEC work with SMP on ARM VE TC2 board,
>> I set nr_cpus=2 (i.e boot only A15's) this works with LE kernel.
>
> Interesting, is this with a mainline kernel? I don't see how SMP kexec can
> work on TC2 without additional patches to park the secondary cores safely.
>

Yes, it is our internal kernel based on 3.10.3. I have not made any changes
related to this. I found that booting only 2 CPU's works
and I continue to check Kdump and other features on top of this.

However with Big Endian, I see that Kexec is not stable. I suspect
that UART is the issue. because playing around with some printk and delays
make it work. Any help? I plan to reset pl011 before kexec softreset.
But could not find any register to reset complete pl011 uart.
I will try to reset/clear IMSC, ICR and CR registers of pl011 and check.

Note: On Kexec with CONFIG_KEXEC_JUMP disabled, the softreboot happens
without resetting/shutdown of any devices


> Will
Will Deacon Aug. 13, 2013, 11:15 a.m. UTC | #4
On Mon, Aug 12, 2013 at 10:59:45AM +0100, Vijay Kilari wrote:
> On Fri, Aug 9, 2013 at 3:20 AM, Will Deacon <will.deacon@arm.com> wrote:
> > On Mon, Aug 05, 2013 at 01:12:17PM +0100, Vijay Kilari wrote:
> >> I am trying to make kexec work on BE kernel on ARM VE TC2.
> >>
> >> First, to make KEXEC work with SMP on ARM VE TC2 board,
> >> I set nr_cpus=2 (i.e boot only A15's) this works with LE kernel.
> >
> > Interesting, is this with a mainline kernel? I don't see how SMP kexec can
> > work on TC2 without additional patches to park the secondary cores safely.
> >
> 
> Yes, it is our internal kernel based on 3.10.3. I have not made any changes
> related to this. I found that booting only 2 CPU's works
> and I continue to check Kdump and other features on top of this.

I think 2 CPUs is working by fluke. Try kexecing a Thumb kernel from an ARM
kernel.

> However with Big Endian, I see that Kexec is not stable. I suspect
> that UART is the issue. because playing around with some printk and delays
> make it work. Any help? I plan to reset pl011 before kexec softreset.
> But could not find any register to reset complete pl011 uart.
> I will try to reset/clear IMSC, ICR and CR registers of pl011 and check.

Wait are you trying to kexec a BE kernel from an LE kernel? That would be
similar to the Thumb/ARM case I mentioned above. A better starting point
would be to try UP kernels and get that working first, since we already know
that SMP kexec is broken on TC2.

Will
Nicolas Pitre Aug. 13, 2013, 10:52 p.m. UTC | #5
On Thu, 8 Aug 2013, Will Deacon wrote:

> On Mon, Aug 05, 2013 at 01:12:17PM +0100, Vijay Kilari wrote:
> > Hi Will,
> > 
> > I am trying to make kexec work on BE kernel on ARM VE TC2.
> > 
> > First, to make KEXEC work with SMP on ARM VE TC2 board,
> > I set nr_cpus=2 (i.e boot only A15's) this works with LE kernel.
> 
> Interesting, is this with a mainline kernel? I don't see how SMP kexec can
> work on TC2 without additional patches to park the secondary cores safely.

BTW those patches are available in linux-next at the moment.


Nicolas
Vijay Kilari Aug. 14, 2013, 5:46 a.m. UTC | #6
On Wed, Aug 14, 2013 at 4:22 AM, Nicolas Pitre <nico@fluxnic.net> wrote:
> On Thu, 8 Aug 2013, Will Deacon wrote:
>
>> On Mon, Aug 05, 2013 at 01:12:17PM +0100, Vijay Kilari wrote:
>> > Hi Will,
>> >
>> > I am trying to make kexec work on BE kernel on ARM VE TC2.
>> >
>> > First, to make KEXEC work with SMP on ARM VE TC2 board,
>> > I set nr_cpus=2 (i.e boot only A15's) this works with LE kernel.
>>
>> Interesting, is this with a mainline kernel? I don't see how SMP kexec can
>> work on TC2 without additional patches to park the secondary cores safely.
>
> BTW those patches are available in linux-next at the moment.

Thanks for this info.
I see that MCPM, TC2_PM & SPC configuration needs to be enabled to have
TC2 power management. However MCPM also depends on CCI configuration
to register smps ops.
In my config, I dont have CCI config enabled

Can you please suggest right configuration to be enabled and also dts
configuration
for SPC, CCI to enable TC2 power mgmt.

Also I am using u-boot. Do I need to use UEFI/firmware to enable TC2 power mgmt?
I remember, some time back, I have tried linaro tracking git and
failed to boot my board
>
>
> Nicolas
Nicolas Pitre Aug. 14, 2013, 3:19 p.m. UTC | #7
On Wed, 14 Aug 2013, Vijay Kilari wrote:

> On Wed, Aug 14, 2013 at 4:22 AM, Nicolas Pitre <nico@fluxnic.net> wrote:
> > On Thu, 8 Aug 2013, Will Deacon wrote:
> >
> >> On Mon, Aug 05, 2013 at 01:12:17PM +0100, Vijay Kilari wrote:
> >> > Hi Will,
> >> >
> >> > I am trying to make kexec work on BE kernel on ARM VE TC2.
> >> >
> >> > First, to make KEXEC work with SMP on ARM VE TC2 board,
> >> > I set nr_cpus=2 (i.e boot only A15's) this works with LE kernel.
> >>
> >> Interesting, is this with a mainline kernel? I don't see how SMP kexec can
> >> work on TC2 without additional patches to park the secondary cores safely.
> >
> > BTW those patches are available in linux-next at the moment.
> 
> Thanks for this info.
> I see that MCPM, TC2_PM & SPC configuration needs to be enabled to have
> TC2 power management. However MCPM also depends on CCI configuration
> to register smps ops.
> In my config, I dont have CCI config enabled

You do need CCI support in addition to all the above.  Managing CPUs on 
TC2 is serious business !

> Can you please suggest right configuration to be enabled and also dts 
> configuration for SPC, CCI to enable TC2 power mgmt.

You need the following pieces of firmware:

mbb_v311.ebf or later in MB/HBI0190D/ and proper reference to it in 
MB/HBI0190D/board.txt.

dbb_v110.ebf or later in SITE1/HBI0249A/. The file 
SITE1/HBI0249A/board.txt must have a proper reference to that file,
as well as the following values in the "[SCC REGISTERS]" section:

SCC: 0x700 0x0032F003

Most important here is to have bits 12 through 15 set to 1.

Those firmware files should be available on ARM's web site.

You also need to have the following sections in your device tree source 
file:

- SPC/SCC

  Depending on the flavor of the patch you have, this is either 
  spc@7fff0000 or scc@7fff0000.  You should look for either 
  vexpress-spc.txt or vexpress-scc.txt in 
  Documentation/devicetree/bindings/arm/ and use the example therein.

- CCI

  You need a CCI section as examplified in 
  Documentation/devicetree/bindings/arm/cci.txt.

> Also I am using u-boot. Do I need to use UEFI/firmware to enable TC2 power mgmt?

No.  I'm using U-Boot as well.

> I remember, some time back, I have tried linaro tracking git and
> failed to boot my board

This is most likely because of the above firmware settings and device 
tree requirements.


Nicolas
diff mbox

Patch

diff --git a/arch/arm/kernel /machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 4fb074c..0fb0ff9 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -123,6 +123,18 @@  void machine_crash_shutdown(struct pt_regs *regs)
        printk(KERN_INFO "Loading crashdump kernel...\n");
 }

+static void byte_copy_relocate_kernel(void *dst, const void *src, int size)
+{
+        char *d, *s;
+        d = (char *) dst;
+        s = (char *) src;
+        while (size > 0)
+        {
+                *d++ = *s++;
+                size--;
+        }
+}
+
 /*
  * Function pointer to optional machine-specific reinitialization
  */
@@ -155,9 +167,8 @@  void machine_kexec(struct kimage *image)


        /* copy our kernel relocation code to the control code page */
-       memcpy(reboot_code_buffer,
-              relocate_new_kernel, relocate_new_kernel_size);
-
+       byte_copy_relocate_kernel(reboot_code_buffer,
+              relocate_new_kernel, relocate_new_kernel_size);

        flush_icache_range((unsigned long) reboot_code_buffer,
                           (unsigned long) reboot_code_buffer +