From patchwork Tue Oct 2 07:07:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Yan-Pai Chen X-Patchwork-Id: 1535961 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id BC3203FE1C for ; Tue, 2 Oct 2012 07:10:51 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TIwZx-0002Nk-3h; Tue, 02 Oct 2012 07:07:41 +0000 Received: from mail-bk0-f49.google.com ([209.85.214.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TIwZs-0002NW-Kw for linux-arm-kernel@lists.infradead.org; Tue, 02 Oct 2012 07:07:38 +0000 Received: by bkwj4 with SMTP id j4so4918338bkw.36 for ; Tue, 02 Oct 2012 00:07:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=6+qRODd3QcqxikjQIk7SdHTS9qlBdABh/mPRh0ZKcnU=; b=ow8izZOmWCgFMv9BcXNqHsJz4GjI2cOsysA02SO/LJCPartq2uRPcjKfuaFii+rxS0 meJnv8xJMWmDoaszofpGRV9mYHMFHniO73v9fw+nR4FmBkEPdk1Dch4lQT9s+mF1xciN JJBEOu1OaecYP2I24bunbSrFItzoStt36lHK6jL7j/HICn7dhKiYHiG6LLnW/Vt2PCXg 5Gwf84cScyTPAmfVK7g42VpozQ4EtVFsaVLIKvWH4mdmyrLVZLaydyTs0ZLfrvUHlnWS 7eeTd8xskFFFl3CzAe5BJ8K/JJffeNPakesJZehdM0dR6Yn0yLCMb32Tg1Uu8urOtElE LOwA== MIME-Version: 1.0 Received: by 10.204.130.212 with SMTP id u20mr6309806bks.121.1349161653641; Tue, 02 Oct 2012 00:07:33 -0700 (PDT) Received: by 10.204.170.5 with HTTP; Tue, 2 Oct 2012 00:07:33 -0700 (PDT) In-Reply-To: References: Date: Tue, 2 Oct 2012 15:07:33 +0800 Message-ID: Subject: Re: [RFC] arm/mm: add a protection when flushing anonymous pages From: Andrew Yan-Pai Chen To: Jason Lin X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (yanpai.chen[at]gmail.com) -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.214.49 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Catalin Marinas , Russell King - ARM Linux , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On Mon, Oct 1, 2012 at 11:50 AM, Jason Lin wrote: > > Dear all: > By the way, I used the CPU with VIPT cache. > Thanks. > > 2012/10/1 Jason Lin : > > Dear all: > > When I do LTP direct I/O tests, it produced a cache coherence issue > > caused by flush_pfn_alias() (arch/arm/mm/flush.c). > > I think we should to disable preemption or lock before setting page > > table and enable preemption or unlock after flushing pages > > > > Any comments are appreciated. > > Thanks. > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel [RFC PATCH] make flush_pfn_alias() nonpreemptible Since flush_pfn_alias() is preemptible, it is possible to be preempted just after set_top_pte() is done. If the process which preempts the previous happened to invoke flush_pfn_alias() with the same colour vaddr as that of the previous, the same top pte will be overwritten. When switching back to the previous, it attempts to flush cache lines with incorrect mapping. Then no lines (or wrong lines) will be flushed because of the nature of vipt caches. asm( "mcrr p15, 0, %1, %0, c14\n" @@ -34,6 +36,8 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr) : : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero) : "cc"); + + preempt_enable(); } --- Regards, Andrew diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index 40ca11e..bd07918 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c @@ -27,6 +27,8 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr) unsigned long to = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT); const int zero = 0; + preempt_disable(); + set_top_pte(to, pfn_pte(pfn, PAGE_KERNEL));