From patchwork Mon Sep 24 03:06:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanho Min X-Patchwork-Id: 1496101 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 6B3F6DFFD0 for ; Mon, 24 Sep 2012 03:07:57 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TFz07-00086M-6Z; Mon, 24 Sep 2012 03:06:27 +0000 Received: from mail-wg0-f49.google.com ([74.125.82.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TFz03-00085W-BJ for linux-arm-kernel@lists.infradead.org; Mon, 24 Sep 2012 03:06:24 +0000 Received: by wgbdt14 with SMTP id dt14so3099723wgb.18 for ; Sun, 23 Sep 2012 20:06:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:date:message-id:subject:from:to:content-type; bh=OV8YvUeBHqdFyOkSDLARAVuqKUlC+Kz72u9YUwMi8sI=; b=GXeeMs8qe4uN8rKuDDw4gU+f/TYA4468X0cSwK7drb7Yu3yfrgBdLOldOIoODqAYUi UlbKZ01WPBXJWV0STf55bM8nlebEbk6LtrhkcHF/WxdtBNdIN5mFTYMd/OE5FFbZG7qh K1507Z8/dW+RjTafn+9GRuUXuLlNnMzqRcjXdoJlo85obw+TQsdzLP7WA64SBb8IWgOb zC3eHv+URarGRPSokuS20Ny4tfllK4kUeezhiHEPkzY6twZYJyt8X7P3Ne/r9sHZSRBV 9Kjl5vH21nttDl490C0ft+SWxcC/TYtu2Auzayh4310wctrNFnCkrzzUOyREot7JD8eD UY4g== MIME-Version: 1.0 Received: by 10.180.91.169 with SMTP id cf9mr11384663wib.1.1348455979713; Sun, 23 Sep 2012 20:06:19 -0700 (PDT) Received: by 10.194.56.98 with HTTP; Sun, 23 Sep 2012 20:06:19 -0700 (PDT) Date: Mon, 24 Sep 2012 12:06:19 +0900 Message-ID: Subject: [PATCH] ARM: gic: fix irq affinity mismatch. From: Chanho Min To: Russell King , Marc Zyngier , Grant Likely , Will Deacon , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (chanho0207[at]gmail.com) -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.49 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (chanho0207[at]gmail.com) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Even if we set affinity to multiple cpus via procfs, gic_set_affinity allows to set one target only. But, '/proc/irq/xxx/smp_affinity' shows as we are successful in the setting of multiple affinity. Thus irq_data-> affinity mismatches with the GICD_ITARGETSRs. fix it as bellows. - Set the default affinity to the boot cpu in gic_dist_init. thereafter, irq_data->affinity will be set to default 1-bit affinity. - Even if we write multiple bits to smp_affinity, both irq_data and gic register will be set one cpu. procfs will show 1 bit affinity as well. Signed-off-by: Chanho Min --- arch/arm/common/gic.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) #endif @@ -355,6 +361,12 @@ static void __init gic_dist_init(struct gic_chip_data *gic) cpumask |= cpumask << 8; cpumask |= cpumask << 16; +#ifdef CONFIG_SMP + /* Set the default affinity to the boot cpu. */ + cpumask_clear(irq_default_affinity); + cpumask_set_cpu(cpu, irq_default_affinity); +#endif + writel_relaxed(0, base + GIC_DIST_CTRL); /* diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index aa52699..fb8ac8e 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -249,6 +249,12 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, writel_relaxed(val | bit, reg); raw_spin_unlock(&irq_controller_lock); + if (cpumask_next_and(cpu, mask_val, cpu_present_mask) < nr_cpu_ids) { + cpumask_clear(d->affinity); + cpumask_set_cpu(cpu, d->affinity); + return IRQ_SET_MASK_OK_NOCOPY; + } + return IRQ_SET_MASK_OK; }