diff mbox

[02/16] ARM: l2c: add platform independent core L2 cache initialisation

Message ID E1WeosP-0002PO-5m@rmk-PC.arm.linux.org.uk (mailing list archive)
State New, archived
Headers show

Commit Message

Russell King April 28, 2014, 4:57 p.m. UTC
Add a hook into the core ARM code to perform L2 cache initialisation
in a platform independent manner.  Platforms still get to indicate
their auxiliary control register values and mask, but the
initialisation call will now be made from generic code.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
 arch/arm/include/asm/mach/arch.h |  3 +++
 arch/arm/kernel/irq.c            | 12 ++++++++++++
 2 files changed, 15 insertions(+)

Comments

Rob Herring April 28, 2014, 5:54 p.m. UTC | #1
On Mon, Apr 28, 2014 at 11:57 AM, Russell King
<rmk+kernel@arm.linux.org.uk> wrote:
> Add a hook into the core ARM code to perform L2 cache initialisation
> in a platform independent manner.  Platforms still get to indicate
> their auxiliary control register values and mask, but the
> initialisation call will now be made from generic code.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

[...]

> diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
> index 9723d17b8f38..2c4257604513 100644
> --- a/arch/arm/kernel/irq.c
> +++ b/arch/arm/kernel/irq.c
> @@ -37,6 +37,7 @@
>  #include <linux/proc_fs.h>
>  #include <linux/export.h>
>
> +#include <asm/hardware/cache-l2x0.h>
>  #include <asm/exception.h>
>  #include <asm/mach/arch.h>
>  #include <asm/mach/irq.h>
> @@ -115,10 +116,21 @@ EXPORT_SYMBOL_GPL(set_irq_flags);
>
>  void __init init_IRQ(void)
>  {
> +       int ret;
> +
>         if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq)
>                 irqchip_init();
>         else
>                 machine_desc->init_irq();
> +
> +       if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) &&
> +           (machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) {
> +               outer_cache.write_sec = machine_desc->l2c_write_sec;
> +               ret = l2x0_of_init(machine_desc->l2c_aux_val,
> +                                  machine_desc->l2c_aux_mask);

This function should be a nop if there is no DT node matching, so we
don't really need to trigger calling it based on machine_desc values.
If we do that, then we can have aux_mask and aux_val values of 0 for
both also mean don't do any aux ctrl setup. That would help minimize
the machine_desc for many platforms.

Rob
Russell King - ARM Linux April 28, 2014, 6:23 p.m. UTC | #2
On Mon, Apr 28, 2014 at 12:54:58PM -0500, Rob Herring wrote:
> This function should be a nop if there is no DT node matching, so we
> don't really need to trigger calling it based on machine_desc values.
> If we do that, then we can have aux_mask and aux_val values of 0 for
> both also mean don't do any aux ctrl setup. That would help minimize
> the machine_desc for many platforms.

Calling it with both set to zero results in the auxiliary control register
being cleared to zero.  We don't want that to happen.
Rob Herring April 28, 2014, 6:50 p.m. UTC | #3
On Mon, Apr 28, 2014 at 1:23 PM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Mon, Apr 28, 2014 at 12:54:58PM -0500, Rob Herring wrote:
>> This function should be a nop if there is no DT node matching, so we
>> don't really need to trigger calling it based on machine_desc values.
>> If we do that, then we can have aux_mask and aux_val values of 0 for
>> both also mean don't do any aux ctrl setup. That would help minimize
>> the machine_desc for many platforms.
>
> Calling it with both set to zero results in the auxiliary control register
> being cleared to zero.  We don't want that to happen.

Right, but we can make the core L2 init code only write aux ctrl if
(aux_val && ~aux_mask). Then you don't have to add the values on a
bunch of platforms.

Rob
Russell King - ARM Linux April 28, 2014, 7:12 p.m. UTC | #4
On Mon, Apr 28, 2014 at 01:50:33PM -0500, Rob Herring wrote:
> On Mon, Apr 28, 2014 at 1:23 PM, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
> > On Mon, Apr 28, 2014 at 12:54:58PM -0500, Rob Herring wrote:
> >> This function should be a nop if there is no DT node matching, so we
> >> don't really need to trigger calling it based on machine_desc values.
> >> If we do that, then we can have aux_mask and aux_val values of 0 for
> >> both also mean don't do any aux ctrl setup. That would help minimize
> >> the machine_desc for many platforms.
> >
> > Calling it with both set to zero results in the auxiliary control register
> > being cleared to zero.  We don't want that to happen.
> 
> Right, but we can make the core L2 init code only write aux ctrl if
> (aux_val && ~aux_mask). Then you don't have to add the values on a
> bunch of platforms.

I would rather add them right now rather than introduce new logic which
_could_ potentially change the behaviour for an existing platform.  Maybe
that's an improvement to come after this series is merged, but I'm already
up to almost 100 patches in this series right now, and I'll be damned if
I'm going to change the behaviour of this stuff even more as part of a
single series.
diff mbox

Patch

diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 17a3fa2979e8..5249cc3c52f4 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -45,6 +45,9 @@  struct machine_desc {
 	unsigned char		reserve_lp1 :1;	/* never has lp1	*/
 	unsigned char		reserve_lp2 :1;	/* never has lp2	*/
 	enum reboot_mode	reboot_mode;	/* default restart mode	*/
+	unsigned		l2c_aux_val;	/* L2 cache aux value	*/
+	unsigned		l2c_aux_mask;	/* L2 cache aux mask	*/
+	void			(*l2c_write_sec)(unsigned long, unsigned);
 	struct smp_operations	*smp;		/* SMP operations	*/
 	bool			(*smp_init)(void);
 	void			(*fixup)(struct tag *, char **,
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 9723d17b8f38..2c4257604513 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -37,6 +37,7 @@ 
 #include <linux/proc_fs.h>
 #include <linux/export.h>
 
+#include <asm/hardware/cache-l2x0.h>
 #include <asm/exception.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
@@ -115,10 +116,21 @@  EXPORT_SYMBOL_GPL(set_irq_flags);
 
 void __init init_IRQ(void)
 {
+	int ret;
+
 	if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq)
 		irqchip_init();
 	else
 		machine_desc->init_irq();
+
+	if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) &&
+	    (machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) {
+		outer_cache.write_sec = machine_desc->l2c_write_sec;
+		ret = l2x0_of_init(machine_desc->l2c_aux_val,
+				   machine_desc->l2c_aux_mask);
+		if (ret)
+			pr_err("L2C: failed to init: %d\n", ret);
+	}
 }
 
 #ifdef CONFIG_MULTI_IRQ_HANDLER