@@ -823,6 +823,7 @@ static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port,
phy_interface_t *default_interface)
{
struct mv88e6xxx_chip *chip = ds->priv;
+ u8 cmode = chip->ports[port].cmode;
chip->info->ops->phylink_get_caps(chip, port, config);
@@ -830,6 +831,14 @@ static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port,
if (mv88e6xxx_phy_is_internal(ds, port))
__set_bit(PHY_INTERFACE_MODE_GMII,
config->supported_interfaces);
+
+ if (chip->info->ops->port_max_speed_mode)
+ *default_interface = chip->info->ops->port_max_speed_mode(port);
+ else if (cmode < ARRAY_SIZE(mv88e6xxx_phy_interface_modes) &&
+ mv88e6xxx_phy_interface_modes[cmode])
+ *default_interface = mv88e6xxx_phy_interface_modes[cmode];
+ else if (cmode == MV88E6XXX_PORT_STS_CMODE_RGMII)
+ *default_interface = PHY_INTERFACE_MODE_RGMII;
}
static void mv88e6xxx_mac_config(struct dsa_switch *ds, int port,
Report the maximum speed interface mode for the port, or if we don't have that information, the hardware configured interface mode for the port. This allows phylink to know which interface mode CPU and DSA ports are operating, which will be necessary when we want to select the maximum speed for the port (required for such ports without a PHY or fixed-link specified in firmware.) Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> --- drivers/net/dsa/mv88e6xxx/chip.c | 9 +++++++++ 1 file changed, 9 insertions(+)