From patchwork Fri May 31 11:26:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 13681547 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 098F8C25B7C for ; Fri, 31 May 2024 11:27:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Date:Message-Id:MIME-Version:Subject:Cc :To:From:References:In-Reply-To:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=pDP91dCC+1ccnJMsI7IvV3i4DAKoFnHkCtBN/VKHgU0=; b=DGGp09qlboBZex WSK997t1InzoAvkYCYWmJyK1SzFkRp1xilLuJSCRrvHFtB13p4dBpJ+8ipauvV7zi/ozzQpzyNed6 kNDpi3jD+fCn0EZILqKW0a5U8vbFLGhbZDnVZCMV/tVsV8QVTaAN+h+ZM8STSG2jVQVHFCjM62K2b RkJW2ZWsKnamK/AEZPpAZsoALWAQZzgGZirkXCuibK33lsoG2aAJQPunlSxh7ShmIFg2te2gb9sxM 4u/cJ7ka8gfYcSey2r9hr2W9Bq3wi6oLTVnOFehMcD5cFgpwpKzjobsbl8WtA/mxzGxXHtdChTqF4 s0jTV64zMLCUui08YDSQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sD0Pd-0000000A4MO-03Ak; Fri, 31 May 2024 11:27:09 +0000 Received: from pandora.armlinux.org.uk ([2001:4d48:ad52:32c8:5054:ff:fe00:142]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sD0PQ-0000000A4Em-0eNU for linux-arm-kernel@lists.infradead.org; Fri, 31 May 2024 11:26:58 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=nYV0iwaM4CrzqivMDUO7NpiYXQHAZmA2iACOt/v5Uqw=; b=mdiCJmxl5lFpKc42IfdPL7sG0Y yhaC0eybZDMUUz1JsIXzDRzvGNXhnX3j3BvEWhMqokJ1EsNURsoHOWml8TWUvmRgceh5DWkWctS4r CRxeeKrYZwaecnmmBs7Zn3otZIn21hXgeB5Esn3/KTODsfVfUQasQX+2sGn4oJN0wE8uVXiOqLYGA Fr1bSIx5dAvOO7YDjxWhP4YrGVdKeoWJWk9BHnllwbzWzumtrmQP49xgoSRMRXjCD58Re2hyxxOrI mbcHZ1cbGQk1Hk8KLzAAIsp/+i/nUS4cYH3S5q2+ahY6JeGGwih+BWekAN8GGgbixFkFJc6eB3xqL wSsQB7xA==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:34888 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1sD0P8-0008SZ-2T; Fri, 31 May 2024 12:26:38 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1sD0PA-00EzCC-Qb; Fri, 31 May 2024 12:26:40 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Serge Semin Cc: Andrew Halaney , Alexandre Torgue , Jose Abreu , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH RFC net-next v2 6/8] net: stmmac: dwmac4: move PCS interrupt control MIME-Version: 1.0 Content-Disposition: inline Message-Id: Date: Fri, 31 May 2024 12:26:40 +0100 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240531_042656_392829_9E5515F0 X-CRM114-Status: GOOD ( 12.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Control the PCS interrupt mask from the phylink pcs_enable() and pcs_disable() methods rather than relying on driver variables. This assumes that GMAC_INT_RGSMIIS, GMAC_INT_PCS_LINK and GMAC_INT_PCS_ANE are all relevant to the PCS. Signed-off-by: Russell King (Oracle) --- .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 29 +++++++++++++++++-- 1 file changed, 26 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c index cb99cb69c52b..5cf2a6cb8f66 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c @@ -56,9 +56,6 @@ static void dwmac4_core_init(struct mac_device_info *hw, /* Enable GMAC interrupts */ value = GMAC_INT_DEFAULT_ENABLE; - if (hw->pcs) - value |= GMAC_PCS_IRQ_DEFAULT; - /* Enable FPE interrupt */ if ((GMAC_HW_FEAT_FPESEL & readl(ioaddr + GMAC_HW_FEATURE3)) >> 26) value |= GMAC_INT_FPE_EN; @@ -770,6 +767,30 @@ static int dwmac4_mii_pcs_validate(struct phylink_pcs *pcs, return 0; } +static int dwmac4_mii_pcs_enable(struct phylink_pcs *pcs) +{ + struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs); + void __iomem *ioaddr = hw->pcsr; + u32 intr_enable; + + intr_enable = readl(ioaddr + GMAC_INT_EN); + intr_enable |= GMAC_PCS_IRQ_DEFAULT; + writel(intr_enable, ioaddr + GMAC_INT_EN); + + return 0; +} + +static void dwmac4_mii_pcs_disable(struct phylink_pcs *pcs) +{ + struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs); + void __iomem *ioaddr = hw->pcsr; + u32 intr_enable; + + intr_enable = readl(ioaddr + GMAC_INT_EN); + intr_enable &= ~GMAC_PCS_IRQ_DEFAULT; + writel(intr_enable, ioaddr + GMAC_INT_EN); +} + static int dwmac4_mii_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, phy_interface_t interface, const unsigned long *advertising, @@ -817,6 +838,8 @@ static void dwmac4_mii_pcs_get_state(struct phylink_pcs *pcs, static const struct phylink_pcs_ops dwmac4_mii_pcs_ops = { .pcs_validate = dwmac4_mii_pcs_validate, + .pcs_enable = dwmac4_mii_pcs_enable, + .pcs_disable = dwmac4_mii_pcs_disable, .pcs_config = dwmac4_mii_pcs_config, .pcs_get_state = dwmac4_mii_pcs_get_state, };