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[v4,06/11] ARM: OMAP2+: PM: AM43x powerdomain data

Message ID a3264d8cfea31ba2418ee015b772bef6d5a7ca0a.1380179370.git.afzal@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

Afzal Mohammed Sept. 26, 2013, 9:33 a.m. UTC 
From: Ambresh K <ambresh@ti.com>

Add the data file to describe all power domains in AM43x SoC.
OMAP4 powerdomain operations is being reused here.

Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
---
 arch/arm/mach-omap2/powerdomain.h           |   1 +
 arch/arm/mach-omap2/powerdomains43xx_data.c | 142 ++++++++++++++++++++++++++++
 2 files changed, 143 insertions(+)
 create mode 100644 arch/arm/mach-omap2/powerdomains43xx_data.c

Comments

Paul Walmsley Sept. 30, 2013, 10:27 a.m. UTC | #1 
On Thu, 26 Sep 2013, Afzal Mohammed wrote:

> From: Ambresh K <ambresh@ti.com>
> 
> Add the data file to describe all power domains in AM43x SoC.
> OMAP4 powerdomain operations is being reused here.
> 
> Signed-off-by: Ambresh K <ambresh@ti.com>
> Signed-off-by: Afzal Mohammed <afzal@ti.com>

...

> --- /dev/null
> +++ b/arch/arm/mach-omap2/powerdomains43xx_data.c
> @@ -0,0 +1,142 @@

...

> +static struct powerdomain per_43xx_pwrdm = {
> +	.name		  = "per_pwrdm",
> +	.voltdm		  = { .name = "core" },
> +	.prcm_offs	  = AM43XX_PRM_PER_INST,
> +	.prcm_partition	  = AM43XX_PRM_PARTITION,
> +	.pwrsts		  = PWRSTS_OFF_RET_ON,
> +	.pwrsts_logic_ret = PWRSTS_OFF_RET,
> +	.banks		  = 4,
> +	.pwrsts_mem_ret	= {
> +		[0] = PWRSTS_OFF_RET,	/* icss_mem */
> +		[1] = PWRSTS_OFF_RET,	/* per_mem */
> +		[2] = PWRSTS_OFF_RET,	/* ram1_mem */
> +		[3] = PWRSTS_OFF_RET,	/* ram2_mem */
> +	},
> +	.pwrsts_mem_on	= {
> +		[0] = PWRSTS_OFF_RET,	/* icss_mem */
> +		[1] = PWRSTS_ON,	/* per_mem */
> +		[2] = PWRSTS_OFF_RET,	/* ram1_mem */
> +		[3] = PWRSTS_OFF_RET,	/* ram2_mem */
> +	},
> +	.flags		  = PWRDM_HAS_LOWPOWERSTATECHANGE,
> +};

The pwrsts_mem_on flags don't make any sense here for banks 0, 2, and 3.  
They claim that those banks can never be turned on.  Could you please 
doublecheck these?



- Paul
Afzal Mohammed Sept. 30, 2013, 12:14 p.m. UTC | #2 
Hi Paul,

On Monday 30 September 2013 03:57 PM, Paul Walmsley wrote:
> On Thu, 26 Sep 2013, Afzal Mohammed wrote:

>> From: Ambresh K <ambresh@ti.com>
>>
>> Add the data file to describe all power domains in AM43x SoC.
>> OMAP4 powerdomain operations is being reused here.
>>
>> Signed-off-by: Ambresh K <ambresh@ti.com>
>> Signed-off-by: Afzal Mohammed <afzal@ti.com>
> 
> ...
> 
>> --- /dev/null
>> +++ b/arch/arm/mach-omap2/powerdomains43xx_data.c
>> @@ -0,0 +1,142 @@
> 
> ...
> 
>> +static struct powerdomain per_43xx_pwrdm = {
>> +	.name		  = "per_pwrdm",
>> +	.voltdm		  = { .name = "core" },
>> +	.prcm_offs	  = AM43XX_PRM_PER_INST,
>> +	.prcm_partition	  = AM43XX_PRM_PARTITION,
>> +	.pwrsts		  = PWRSTS_OFF_RET_ON,
>> +	.pwrsts_logic_ret = PWRSTS_OFF_RET,
>> +	.banks		  = 4,
>> +	.pwrsts_mem_ret	= {
>> +		[0] = PWRSTS_OFF_RET,	/* icss_mem */
>> +		[1] = PWRSTS_OFF_RET,	/* per_mem */
>> +		[2] = PWRSTS_OFF_RET,	/* ram1_mem */
>> +		[3] = PWRSTS_OFF_RET,	/* ram2_mem */
>> +	},
>> +	.pwrsts_mem_on	= {
>> +		[0] = PWRSTS_OFF_RET,	/* icss_mem */
>> +		[1] = PWRSTS_ON,	/* per_mem */
>> +		[2] = PWRSTS_OFF_RET,	/* ram1_mem */
>> +		[3] = PWRSTS_OFF_RET,	/* ram2_mem */
>> +	},
>> +	.flags		  = PWRDM_HAS_LOWPOWERSTATECHANGE,
>> +};
> 
> The pwrsts_mem_on flags don't make any sense here for banks 0, 2, and 3.  
> They claim that those banks can never be turned on.  Could you please 
> doublecheck these?

Checked it, they should be PWRSTS_ON, I will fix it.

Regards
Afzal
diff mbox

Patch

diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index baf3d8b..da5a59a 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -257,6 +257,7 @@  extern void am33xx_powerdomains_init(void);
 extern void omap44xx_powerdomains_init(void);
 extern void omap54xx_powerdomains_init(void);
 extern void dra7xx_powerdomains_init(void);
+void am43xx_powerdomains_init(void);
 
 extern struct pwrdm_ops omap2_pwrdm_operations;
 extern struct pwrdm_ops omap3_pwrdm_operations;
diff --git a/arch/arm/mach-omap2/powerdomains43xx_data.c b/arch/arm/mach-omap2/powerdomains43xx_data.c
new file mode 100644
index 0000000..febc879
--- /dev/null
+++ b/arch/arm/mach-omap2/powerdomains43xx_data.c
@@ -0,0 +1,142 @@ 
+/*
+ * AM43xx Power domains framework
+ *
+ * Copyright (C) 2013 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include "powerdomain.h"
+
+#include "prcm-common.h"
+#include "prcm44xx.h"
+#include "prcm43xx.h"
+
+static struct powerdomain gfx_43xx_pwrdm = {
+	.name		  = "gfx_pwrdm",
+	.voltdm		  = { .name = "core" },
+	.prcm_offs	  = AM43XX_PRM_GFX_INST,
+	.prcm_partition	  = AM43XX_PRM_PARTITION,
+	.pwrsts		  = PWRSTS_OFF_ON,
+	.banks		  = 1,
+	.pwrsts_mem_ret	= {
+		[0] = PWRSTS_OFF_RET,	/* gfx_mem */
+	},
+	.pwrsts_mem_on	= {
+		[0] = PWRSTS_ON,	/* gfx_mem */
+	},
+	.flags		  = PWRDM_HAS_LOWPOWERSTATECHANGE,
+};
+
+static struct powerdomain mpu_43xx_pwrdm = {
+	.name		  = "mpu_pwrdm",
+	.voltdm		  = { .name = "mpu" },
+	.prcm_offs	  = AM43XX_PRM_MPU_INST,
+	.prcm_partition	  = AM43XX_PRM_PARTITION,
+	.pwrsts		  = PWRSTS_OFF_RET_ON,
+	.pwrsts_logic_ret = PWRSTS_OFF_RET,
+	.banks		  = 3,
+	.pwrsts_mem_ret	= {
+		[0] = PWRSTS_OFF_RET,	/* mpu_l1 */
+		[1] = PWRSTS_OFF_RET,	/* mpu_l2 */
+		[2] = PWRSTS_OFF_RET,	/* mpu_ram */
+	},
+	.pwrsts_mem_on	= {
+		[0] = PWRSTS_ON,	/* mpu_l1 */
+		[1] = PWRSTS_ON,	/* mpu_l2 */
+		[2] = PWRSTS_ON,	/* mpu_ram */
+	},
+	.flags		  = PWRDM_HAS_LOWPOWERSTATECHANGE,
+};
+
+static struct powerdomain rtc_43xx_pwrdm = {
+	.name		  = "rtc_pwrdm",
+	.voltdm		  = { .name = "rtc" },
+	.prcm_offs	  = AM43XX_PRM_RTC_INST,
+	.prcm_partition	  = AM43XX_PRM_PARTITION,
+	.pwrsts		  = PWRSTS_ON,
+};
+
+static struct powerdomain wkup_43xx_pwrdm = {
+	.name		  = "wkup_pwrdm",
+	.voltdm		  = { .name = "core" },
+	.prcm_offs	  = AM43XX_PRM_WKUP_INST,
+	.prcm_partition	  = AM43XX_PRM_PARTITION,
+	.pwrsts		  = PWRSTS_ON,
+	.banks		  = 1,
+	.pwrsts_mem_ret	= {
+		[0] = PWRSTS_OFF,	/* debugss_mem */
+	},
+	.pwrsts_mem_on	= {
+		[0] = PWRSTS_ON,	/* debugss_mem */
+	},
+};
+
+static struct powerdomain tamper_43xx_pwrdm = {
+	.name		  = "tamper_pwrdm",
+	.voltdm		  = { .name = "tamper" },
+	.prcm_offs	  = AM43XX_PRM_TAMPER_INST,
+	.prcm_partition	  = AM43XX_PRM_PARTITION,
+	.pwrsts		  = PWRSTS_ON,
+};
+
+static struct powerdomain cefuse_43xx_pwrdm = {
+	.name		  = "cefuse_pwrdm",
+	.voltdm		  = { .name = "core" },
+	.prcm_offs	  = AM43XX_PRM_CEFUSE_INST,
+	.prcm_partition	  = AM43XX_PRM_PARTITION,
+	.pwrsts		  = PWRSTS_OFF_ON,
+	.flags		  = PWRDM_HAS_LOWPOWERSTATECHANGE,
+};
+
+static struct powerdomain per_43xx_pwrdm = {
+	.name		  = "per_pwrdm",
+	.voltdm		  = { .name = "core" },
+	.prcm_offs	  = AM43XX_PRM_PER_INST,
+	.prcm_partition	  = AM43XX_PRM_PARTITION,
+	.pwrsts		  = PWRSTS_OFF_RET_ON,
+	.pwrsts_logic_ret = PWRSTS_OFF_RET,
+	.banks		  = 4,
+	.pwrsts_mem_ret	= {
+		[0] = PWRSTS_OFF_RET,	/* icss_mem */
+		[1] = PWRSTS_OFF_RET,	/* per_mem */
+		[2] = PWRSTS_OFF_RET,	/* ram1_mem */
+		[3] = PWRSTS_OFF_RET,	/* ram2_mem */
+	},
+	.pwrsts_mem_on	= {
+		[0] = PWRSTS_OFF_RET,	/* icss_mem */
+		[1] = PWRSTS_ON,	/* per_mem */
+		[2] = PWRSTS_OFF_RET,	/* ram1_mem */
+		[3] = PWRSTS_OFF_RET,	/* ram2_mem */
+	},
+	.flags		  = PWRDM_HAS_LOWPOWERSTATECHANGE,
+};
+
+static struct powerdomain *powerdomains_am43xx[] __initdata = {
+	&gfx_43xx_pwrdm,
+	&mpu_43xx_pwrdm,
+	&rtc_43xx_pwrdm,
+	&wkup_43xx_pwrdm,
+	&tamper_43xx_pwrdm,
+	&cefuse_43xx_pwrdm,
+	&per_43xx_pwrdm,
+	NULL
+};
+
+static int am43xx_check_vcvp(void)
+{
+	return 0;
+}
+
+void __init am43xx_powerdomains_init(void)
+{
+	omap4_pwrdm_operations.pwrdm_has_voltdm = am43xx_check_vcvp;
+	pwrdm_register_platform_funcs(&omap4_pwrdm_operations);
+	pwrdm_register_pwrdms(powerdomains_am43xx);
+	pwrdm_complete_init();
+}