diff mbox series

[2/2] pwm: meson: omit video/hdmi clock as mux parent

Message ID a3fb613f-73d4-c9c7-f48f-ffd79fa654aa@gmail.com (mailing list archive)
State New, archived
Headers show
Series pwm: meson: make full use of common clock framework | expand

Commit Message

Heiner Kallweit April 8, 2023, 8:43 p.m. UTC
meson_vclk may change the rate of the video clock. Therefore better
don't use it as pwm mux parent. After removing this clock from the
parent list pwm_gxbb_data and pwm_g12a_ee_data are the same as
pwm_meson8b_data. So we can remove them.

Reported-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
---
 drivers/pwm/pwm-meson.c | 29 ++++++++---------------------
 1 file changed, 8 insertions(+), 21 deletions(-)

Comments

Martin Blumenstingl April 11, 2023, 5:09 p.m. UTC | #1
Hi Heiner,

On Sat, Apr 8, 2023 at 10:43 PM Heiner Kallweit <hkallweit1@gmail.com> wrote:
[...]
> +               if (meson->data->omit_video_clock_parent)
> +                       channel->mux.table = (u32[]){ 0, 2, 3 };
Most likely it won't be relevant anymore once we switch to
clk_parent_data but this part of the code is currently a no-op.
A few lines below there's an unconditional assignment of
channel->mux.table = NULL;


Best regards,
Martin
diff mbox series

Patch

diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index 9ec96c926..b5c746fab 100644
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c
@@ -99,6 +99,7 @@  struct meson_pwm_channel {
 struct meson_pwm_data {
 	const char * const *parent_names;
 	unsigned int num_parents;
+	bool omit_video_clock_parent;
 };
 
 struct meson_pwm {
@@ -348,21 +349,13 @@  static const struct pwm_ops meson_pwm_ops = {
 };
 
 static const char * const pwm_meson8b_parent_names[] = {
-	"xtal", "vid_pll", "fclk_div4", "fclk_div3"
+	"xtal", "fclk_div4", "fclk_div3"
 };
 
 static const struct meson_pwm_data pwm_meson8b_data = {
 	.parent_names = pwm_meson8b_parent_names,
 	.num_parents = ARRAY_SIZE(pwm_meson8b_parent_names),
-};
-
-static const char * const pwm_gxbb_parent_names[] = {
-	"xtal", "hdmi_pll", "fclk_div4", "fclk_div3"
-};
-
-static const struct meson_pwm_data pwm_gxbb_data = {
-	.parent_names = pwm_gxbb_parent_names,
-	.num_parents = ARRAY_SIZE(pwm_gxbb_parent_names),
+	.omit_video_clock_parent = true,
 };
 
 /*
@@ -414,15 +407,6 @@  static const struct meson_pwm_data pwm_g12a_ao_cd_data = {
 	.num_parents = ARRAY_SIZE(pwm_g12a_ao_cd_parent_names),
 };
 
-static const char * const pwm_g12a_ee_parent_names[] = {
-	"xtal", "hdmi_pll", "fclk_div4", "fclk_div3"
-};
-
-static const struct meson_pwm_data pwm_g12a_ee_data = {
-	.parent_names = pwm_g12a_ee_parent_names,
-	.num_parents = ARRAY_SIZE(pwm_g12a_ee_parent_names),
-};
-
 static const struct of_device_id meson_pwm_matches[] = {
 	{
 		.compatible = "amlogic,meson8b-pwm",
@@ -430,7 +414,7 @@  static const struct of_device_id meson_pwm_matches[] = {
 	},
 	{
 		.compatible = "amlogic,meson-gxbb-pwm",
-		.data = &pwm_gxbb_data
+		.data = &pwm_meson8b_data
 	},
 	{
 		.compatible = "amlogic,meson-gxbb-ao-pwm",
@@ -446,7 +430,7 @@  static const struct of_device_id meson_pwm_matches[] = {
 	},
 	{
 		.compatible = "amlogic,meson-g12a-ee-pwm",
-		.data = &pwm_g12a_ee_data
+		.data = &pwm_meson8b_data
 	},
 	{
 		.compatible = "amlogic,meson-g12a-ao-pwm-ab",
@@ -480,6 +464,9 @@  static int meson_pwm_init_channels(struct meson_pwm *meson)
 		init.parent_names = meson->data->parent_names;
 		init.num_parents = meson->data->num_parents;
 
+		if (meson->data->omit_video_clock_parent)
+			channel->mux.table = (u32[]){ 0, 2, 3 };
+
 		channel->mux.reg = meson->base + REG_MISC_AB;
 		channel->mux.shift =
 				meson_pwm_per_channel_data[i].clk_sel_shift;