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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id c2sm8264253wrp.46.2020.01.09.06.02.36 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 09 Jan 2020 06:02:36 -0800 (PST) From: Michal Simek To: linux-arm-kernel@lists.infradead.org, git@xilinx.com Subject: [PATCH 5/7] arm64: zynqmp: Add label property to all ina226 on zcu102 Date: Thu, 9 Jan 2020 15:02:19 +0100 Message-Id: X-Mailer: git-send-email 2.24.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200109_060241_225799_9646F0E4 X-CRM114-Status: GOOD ( 10.37 ) X-Spam-Score: 0.3 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:343 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 SPF_NONE SPF: sender does not publish an SPF Record 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Anurag Kumar Vulisha , Rajan Vaja , linux-kernel@vger.kernel.org, Rob Herring , Harini Katakam Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek --- .../boot/dts/xilinx/zynqmp-zcu102-revA.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts index afdd0ff37900..4f801721564f 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts @@ -253,60 +253,70 @@ i2c@0 { u76: ina226@40 { /* u76 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u76"; reg = <0x40>; shunt-resistor = <5000>; }; u77: ina226@41 { /* u77 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u77"; reg = <0x41>; shunt-resistor = <5000>; }; u78: ina226@42 { /* u78 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u78"; reg = <0x42>; shunt-resistor = <5000>; }; u87: ina226@43 { /* u87 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u87"; reg = <0x43>; shunt-resistor = <5000>; }; u85: ina226@44 { /* u85 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u85"; reg = <0x44>; shunt-resistor = <5000>; }; u86: ina226@45 { /* u86 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u86"; reg = <0x45>; shunt-resistor = <5000>; }; u93: ina226@46 { /* u93 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u93"; reg = <0x46>; shunt-resistor = <5000>; }; u88: ina226@47 { /* u88 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u88"; reg = <0x47>; shunt-resistor = <5000>; }; u15: ina226@4a { /* u15 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u15"; reg = <0x4a>; shunt-resistor = <5000>; }; u92: ina226@4b { /* u92 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u92"; reg = <0x4b>; shunt-resistor = <5000>; }; @@ -319,48 +329,56 @@ i2c@1 { u79: ina226@40 { /* u79 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u79"; reg = <0x40>; shunt-resistor = <2000>; }; u81: ina226@41 { /* u81 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u81"; reg = <0x41>; shunt-resistor = <5000>; }; u80: ina226@42 { /* u80 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u80"; reg = <0x42>; shunt-resistor = <5000>; }; u84: ina226@43 { /* u84 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u84"; reg = <0x43>; shunt-resistor = <5000>; }; u16: ina226@44 { /* u16 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u16"; reg = <0x44>; shunt-resistor = <5000>; }; u65: ina226@45 { /* u65 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u65"; reg = <0x45>; shunt-resistor = <5000>; }; u74: ina226@46 { /* u74 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u74"; reg = <0x46>; shunt-resistor = <5000>; }; u75: ina226@47 { /* u75 */ compatible = "ti,ina226"; #io-channel-cells = <1>; + label = "ina226-u75"; reg = <0x47>; shunt-resistor = <5000>; };