From patchwork Wed Jun 15 13:35:26 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Hofmann X-Patchwork-Id: 881902 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p5FDZvHo002634 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 15 Jun 2011 13:36:18 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QWqG4-0004vV-Cc; Wed, 15 Jun 2011 13:35:48 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QWqG3-0001H1-UZ; Wed, 15 Jun 2011 13:35:47 +0000 Received: from mxvs2.esa.t-systems.com ([81.7.202.143]) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QWqFv-0001GX-T7 for linux-arm-kernel@lists.infradead.org; Wed, 15 Jun 2011 13:35:45 +0000 Received: from unknown (HELO nl-exc-01.intra.local) ([82.210.235.24]) by mx.esa.t-systems.com with ESMTP; 15 Jun 2011 13:35:27 +0000 Received: from magrathea ([10.101.8.37]) by nl-exc-01.intra.local with Microsoft SMTPSVC(6.0.3790.3959); Wed, 15 Jun 2011 15:35:26 +0200 Date: Wed, 15 Jun 2011 14:35:26 +0100 (BST) From: Frank Hofmann To: Russell King - ARM Linux Subject: Re: [RFC PATCH v5] ARM hibernation / suspend-to-disk (fwd) In-Reply-To: <20110613164452.GE13643@n2100.arm.linux.org.uk> Message-ID: References: <20110613122601.GC12325@n2100.arm.linux.org.uk> <20110613164452.GE13643@n2100.arm.linux.org.uk> User-Agent: Alpine 2.00 (DEB 1167 2008-08-23) MIME-Version: 1.0 X-OriginalArrivalTime: 15 Jun 2011 13:35:26.0536 (UTC) FILETIME=[15DA6C80:01CC2B61] X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110615_093540_502058_EE113669 X-CRM114-Status: GOOD ( 30.52 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [81.7.202.143 listed in list.dnswl.org] Cc: Frank Hofmann , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list Reply-To: frank.hofmann@tomtom.com List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Wed, 15 Jun 2011 13:36:18 +0000 (UTC) On Mon, 13 Jun 2011, Russell King - ARM Linux wrote: > On Mon, Jun 13, 2011 at 02:20:12PM +0100, Frank Hofmann wrote: >> >> >> On Mon, 13 Jun 2011, Russell King - ARM Linux wrote: >> >>> On Mon, Jun 13, 2011 at 01:04:02PM +0100, Frank Hofmann wrote: >>>> To make it clear: IF AND ONLY IF your suspend(-to-ram) func looks like: >>>> >>>> ENTRY(acmeSoC_cpu_suspend) >>>> stmfd sp!, {r4-r12,lr} >>>> ldr r3, resume_mmu_done >>>> bl cpu_suspend >>>> resume_mmu_done: >>>> ldmfd sp!, {r3-r12,pc} >>>> ENDPROC(acmeSoC_cpu_suspend) >>> >>> Nothing has that - because you can't execute that ldmfd after the call >>> to cpu_suspend returns. I don't think you've understood what I said on >>> that subject in the previous thread. >>> >> >> Ok, to illustrate a bit more, what is ok and what not. > > Actually, we can do something about cpu_suspend. > > Currently cpu_suspend is not like a normal C function - when it's called > it returns normally to a bunch of code which is not expected to return. > The return path is via code pointed to by 'r3'. > > It also corrupts a bunch of registers in ways which make it non-compliant > with a C API. > > If we do make this complaint as a normal C-like function, it eliminates > this register saving. We also swap 'lr' and 'r3', so cpu_suspend > effectively only returns to following code on resume - and r3 points > to the suspend code. Hi Russell, this change is perfect; with this, the hibernation support code turns into the attached. That's both better and simpler to perform a full suspend/resume cycle (via resetting in the cpu_suspend "finisher") after the snapshot image has been created, instead of shoehorning a return into this. I've tested the attached on v6 (samsung) and v7 (omap3 nonsecure - yes I know ...) kernels that have the cpu_suspend changes in you've posted Monday. It does what it's supposed to do. And yes, aware that's not enough yet, this is only an attempt to address the "how to snapshot the core state", other outstanding issues will be addressed later. It'd be great to know why this makes your toenails curl so much ... Anyway, this again shows that as far as the core SoC state is concerned, the only difference between the hibernation snapshot and the s2ram soc suspend side are what the "finisher" does: hibernate: s2ram: swsusp_save() low power self-refresh settings, ... Why would calling swsusp_save() not be acceptable in this context ? It's supposed to run in a restricted env (no ints, no scheduling, ...) anyway. FrankH. diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index af44a8f..e78d4f5 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h @@ -246,6 +246,7 @@ static inline void *phys_to_virt(phys_addr_t x) */ #define __pa(x) __virt_to_phys((unsigned long)(x)) #define __va(x) ((void *)__phys_to_virt((unsigned long)(x))) +#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x),0)) #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) /* diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index a5b31af..c64d715 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -30,6 +30,7 @@ obj-$(CONFIG_ARTHUR) += arthur.o obj-$(CONFIG_ISA_DMA) += dma-isa.o obj-$(CONFIG_PCI) += bios32.o isa.o obj-$(CONFIG_PM_SLEEP) += sleep.o +obj-$(CONFIG_HIBERNATION) += hibernate.o obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o obj-$(CONFIG_SMP) += smp.o smp_tlb.o obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o diff --git a/arch/arm/kernel/hibernate.c b/arch/arm/kernel/hibernate.c new file mode 100644 index 0000000..bf1d2ef --- /dev/null +++ b/arch/arm/kernel/hibernate.c @@ -0,0 +1,152 @@ +/* + * Hibernation support specific for ARM + * + * Derived from work on ARM hibernation support by: + * + * Ubuntu project, hibernation support for mach-dove + * Copyright (C) 2010 Nokia Corporation (Hiroshi Doyu) + * Copyright (C) 2010 Texas Instruments, Inc. (Teerth Reddy et al.) + * https://lkml.org/lkml/2010/6/18/4 + * https://lists.linux-foundation.org/pipermail/linux-pm/2010-June/027422.html + * https://patchwork.kernel.org/patch/96442/ + * + * Copyright (C) 2006 Rafael J. Wysocki + * + * License terms: GNU General Public License (GPL) version 2 + */ + +#include +#include +#include +#include + +extern const void __nosave_begin, __nosave_end; + +int pfn_is_nosave(unsigned long pfn) +{ + unsigned long nosave_begin_pfn = __pa_symbol(&__nosave_begin) >> PAGE_SHIFT; + unsigned long nosave_end_pfn = PAGE_ALIGN(__pa_symbol(&__nosave_end)) >> PAGE_SHIFT; + + return (pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn); +} + +void notrace save_processor_state(void) +{ + WARN_ON(num_online_cpus() != 1); + flush_thread(); + local_fiq_disable(); +} + +void notrace restore_processor_state(void) +{ + local_fiq_enable(); +} + +u8 __swsusp_resume_stk[PAGE_SIZE/2] __nosavedata; +static int __swsusp_arch_resume_ret; + +static void notrace __swsusp_arch_reset(void) +{ + extern void cpu_resume(void); + void (*phys_reset)(unsigned long) = + (void (*)(unsigned long))virt_to_phys(cpu_reset); + + flush_tlb_all(); + flush_cache_all(); + + identity_mapping_add(swapper_pg_dir, 0, TASK_SIZE); + flush_tlb_all(); + flush_cache_all(); + + cpu_proc_fin(); + flush_tlb_all(); + flush_cache_all(); + + phys_reset(virt_to_phys(cpu_resume)); +} + +static int __swsusp_arch_resume_finish(void) +{ + cpu_init(); + identity_mapping_del(swapper_pg_dir, 0, TASK_SIZE); + flush_tlb_all(); + flush_cache_all(); + + return __swsusp_arch_resume_ret; +} + +/* + * Snapshot kernel memory and reset the system. + * After resume, the hibernation snapshot is written out. + */ +static void notrace __swsusp_arch_save_image(void) +{ + extern int swsusp_save(void); + + __swsusp_arch_resume_ret = swsusp_save(); + + cpu_switch_mm(swapper_pg_dir, &init_mm); + __swsusp_arch_reset(); +} + +/* + * The framework loads the hibernation image into a linked list anchored + * at restore_pblist, for swsusp_arch_resume() to copy back to the proper + * destinations. + * + * To make this work if resume is triggered from initramfs, the + * pagetables need to be switched to allow writes to kernel mem. + */ +static void notrace __swsusp_arch_restore_image(void) +{ + extern struct pbe *restore_pblist; + struct pbe *pbe; + + cpu_switch_mm(swapper_pg_dir, &init_mm); + + for (pbe = restore_pblist; pbe; pbe = pbe->next) + copy_page(pbe->orig_address, pbe->address); + + /* + * Done - reset and resume from the hibernation image. + */ + __swsusp_arch_resume_ret = 0; /* success at this point */ + __swsusp_arch_reset(); +} + +/* + * Save the current CPU state before suspend / poweroff. + */ +int notrace swsusp_arch_suspend(void) +{ + extern void cpu_suspend(unsigned long, unsigned long, unsigned long, void *); + + cpu_suspend(0, virt_to_phys(0), 0, __swsusp_arch_save_image); + + /* + * After resume, execution restarts here. Clean up and return. + */ + return __swsusp_arch_resume_finish(); +} + +/* + * Resume from the hibernation image. + * Due to the kernel heap / data restore, stack contents change underneath + * and that would make function calls impossible; switch to a temporary + * stack within the nosave region to avoid that problem. + */ +int __naked swsusp_arch_resume(void) +{ + cpu_init(); /* get a clean PSR */ + + /* + * when switch_stack() becomes available, should use that + */ + __asm__ __volatile__("mov sp, %0\n\t" + : : "r"(__swsusp_resume_stk + sizeof(__swsusp_resume_stk)) + : "memory", "cc"); + + __swsusp_arch_restore_image(); + + return 0; +} diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 0074b8d..c668f8f 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -627,6 +627,11 @@ config CPU_USE_DOMAINS config IO_36 bool +config ARCH_HIBERNATION_POSSIBLE + bool + depends on MMU + default y if CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || CPU_XSCALE || CPU_XSC3 || CPU_V6 || CPU_V6K || CPU_V7 + comment "Processor Features" config ARM_THUMB