| Message ID | alpine.DEB.2.00.1207040652240.6760@utopia.booyaka.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Paul Walmsley <paul@pwsan.com> writes: > On Wed, 4 Jul 2012, Paul Walmsley wrote: > >> So the updated patch below uses a clockdomain data flag for this >> instead. > > Here's a version that's a little cleaner. No functional changes. > > > - Paul > > From: Paul Walmsley <paul@pwsan.com> > Date: Wed, 4 Jul 2012 05:22:53 -0600 > Subject: [PATCH] ARM: OMAP2+: hwmod code/clockdomain data: fix 32K sync timer > > Kevin discovered that commit c8d82ff68fb6873691536cf33021977efbf5593c > ("ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod > database") broke CORE idle on OMAP3. This prevents device low power > states. > > The root cause is that the 32K sync timer IP block does not support > smart-idle mode[1], and so the hwmod code keeps the IP block in > no-idle mode while it is active. This in turn prevents the WKUP > clockdomain from transitioning to idle. There is a hardcoded sleep > dependency that prevents the CORE_L3 and CORE_CM clockdomains from > transitioning to idle when the WKUP clockdomain is active[2], so the > chip cannot enter any device low power states. > > It turns out that there is no need to take the 32k sync timer out of > idle. The IP block itself probably does not have any native idle > handling at all, due to its simplicity. Furthermore, the PRCM will > never request target idle for this IP block while the kernel is > running, due to the sleep dependency that prevents the WKUP > clockdomain from idling while the CORE_L3 clockdomain is active. So > we can safely leave the 32k sync timer in target-force-idle mode, even > while we continue to access it. > > This workaround is implemented by defining a new clockdomain flag, > CLKDM_ACTIVE_WITH_MPU, that indicates that the clockdomain is > guaranteed to be active whenever the MPU is inactive. If an IP > block's main functional clock exists inside this clockdomain, and the > IP block does not support smart-idle modes, then the hwmod code will > place the IP block into target force-idle mode even when enabled. The > WKUP clockdomains on OMAP3/4 are marked with this flag. (On OMAP2xxx, > no OCP header existed on the 32k sync timer.) Other clockdomains also > should be marked with this flag, but those changes are deferred until > a later merge window, to create a minimal fix. > > Another theoretically clean fix for this problem would be to implement > PM runtime-based control for 32k sync timer accesses. These PM > runtime calls would need to located in a custom clocksource, since the > 32k sync timer is currently used as an MMIO clocksource. But in > practice, there would be little benefit to doing so; and there would > be some cost, due to the addition of unnecessary lines of code and the > additional CPU overhead of the PM runtime and hwmod code - unnecessary > in this case. > > Another possible fix would have been to modify the pm34xx.c code to > force the IP block idle before entering WFI. But this would not have > been an acceptable approach: we are trying to remove this type of > centralized IP block idle control from the PM code. > > This patch is a collaboration between Kevin Hilman <khilman@ti.com> > and Paul Walmsley <paul@pwsan.com>. > > Thanks to Vaibhav Hiremath <hvaibhav@ti.com> for providing comments on > an earlier version of this patch. Thanks to Tero Kristo > <t-kristo@ti.com> for identifying a bug in an earlier version of this > patch. Thanks to Benoît Cousson <b-cousson@ti.com> for identifying some > bugs in an earlier version of this patch and for implementation comments. > > References: > > 1. Table 16-96 "REG_32KSYNCNT_SYSCONFIG" of the OMAP34xx TRM Rev. ZU > (SWPU223U), available from: > http://www.ti.com/pdfs/wtbu/OMAP34x_ES3.1.x_PUBLIC_TRM_vzU.zip > > 2. Table 4-72 "Sleep Dependencies" of the OMAP34xx TRM Rev. ZU > (SWPU223U) > > 3. ibid. > > Cc: Tony Lindgren <tony@atomide.com> > Cc: Vaibhav Hiremath <hvaibhav@ti.com> > Cc: Benoît Cousson <b-cousson@ti.com> > Cc: Tero Kristo <t-kristo@ti.com> > Cc: Kevin Hilman <khilman@ti.com> > Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Kevin Hilman <khilman@ti.com> I confirm this version is now allowing CORE to hit retention during suspend. Benoit, I hope this is OK with you. We need a fix for this in v3.5 since this is last core bug preventing CORE retention in v3.5. Kevin
On Wed, 4 Jul 2012, Kevin Hilman wrote: > Tested-by: Kevin Hilman <khilman@ti.com> > > I confirm this version is now allowing CORE to hit retention during > suspend. Thanks, want me to add your S-o-b also? - Paul
Hi Kevin, On 07/04/2012 04:27 PM, Kevin Hilman wrote: [...] > Tested-by: Kevin Hilman <khilman@ti.com> > > I confirm this version is now allowing CORE to hit retention during > suspend. > > Benoit, I hope this is OK with you. We need a fix for this in v3.5 > since this is last core bug preventing CORE retention in v3.5. On OMAP4 as well? I've just tried with the hwmod fix for AESS and USB and still cannot reach RET. Am I missing some other patches for OMAP4? Regards, Benoit
On Wed, 2012-07-04 at 18:14 +0200, Benoit Cousson wrote: > Hi Kevin, > > On 07/04/2012 04:27 PM, Kevin Hilman wrote: > > [...] > > > Tested-by: Kevin Hilman <khilman@ti.com> > > > > I confirm this version is now allowing CORE to hit retention during > > suspend. > > > > Benoit, I hope this is OK with you. We need a fix for this in v3.5 > > since this is last core bug preventing CORE retention in v3.5. > > On OMAP4 as well? I've just tried with the hwmod fix for AESS and USB > and still cannot reach RET. > > Am I missing some other patches for OMAP4? You need also fixes for sl2if and mcpdm in addition to above. -Tero
On 07/04/2012 06:41 PM, Tero Kristo wrote: > On Wed, 2012-07-04 at 18:14 +0200, Benoit Cousson wrote: >> Hi Kevin, >> >> On 07/04/2012 04:27 PM, Kevin Hilman wrote: >> >> [...] >> >>> Tested-by: Kevin Hilman <khilman@ti.com> >>> >>> I confirm this version is now allowing CORE to hit retention during >>> suspend. >>> >>> Benoit, I hope this is OK with you. We need a fix for this in v3.5 >>> since this is last core bug preventing CORE retention in v3.5. >> >> On OMAP4 as well? I've just tried with the hwmod fix for AESS and USB >> and still cannot reach RET. >> >> Am I missing some other patches for OMAP4? > > You need also fixes for sl2if and mcpdm in addition to above. Are they in some lo branch already? Benoit
Hi Paul, On 07/04/2012 02:53 PM, Paul Walmsley wrote: > On Wed, 4 Jul 2012, Paul Walmsley wrote: > >> So the updated patch below uses a clockdomain data flag for this >> instead. > > Here's a version that's a little cleaner. No functional changes. [...] > @@ -1141,8 +1144,16 @@ static void _enable_sysc(struct omap_hwmod *oh) > sf = oh->class->sysc->sysc_flags; > > if (sf & SYSC_HAS_SIDLEMODE) { > - idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? > - HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; > + clkdm_act = ((oh->clkdm && > + oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) || > + (oh->_clk->clkdm && This is crashing on OMAP4 due to a NULL oh->_clk that can happen on some hwmod. + (oh->_clk && oh->_clk->clkdm && Is fixing the issue. Regards, Benoit > + oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU)); > + if (clkdm_act && !(oh->class->sysc->idlemodes & > + (SIDLE_SMART | SIDLE_SMART_WKUP))) > + idlemode = HWMOD_IDLEMODE_FORCE; > + else > + idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? > + HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; > _set_slave_idlemode(oh, idlemode, &v); > } >
Hi Benoît On Wed, 4 Jul 2012, Benoit Cousson wrote: > > @@ -1141,8 +1144,16 @@ static void _enable_sysc(struct omap_hwmod *oh) > > sf = oh->class->sysc->sysc_flags; > > > > if (sf & SYSC_HAS_SIDLEMODE) { > > - idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? > > - HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; > > + clkdm_act = ((oh->clkdm && > > + oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) || > > + (oh->_clk->clkdm && > > This is crashing on OMAP4 due to a NULL oh->_clk that can happen on some > hwmod. > > + (oh->_clk && oh->_clk->clkdm && > > Is fixing the issue. Thanks, just made the change and pushed the patch up to git://git.pwsan.com/linux-2.6 in the branch 'omap_fixes_c_3.5rc' - Paul
On Wed, 4 Jul 2012, Benoit Cousson wrote: > On 07/04/2012 06:41 PM, Tero Kristo wrote: > > On Wed, 2012-07-04 at 18:14 +0200, Benoit Cousson wrote: > >> > >> On OMAP4 as well? I've just tried with the hwmod fix for AESS and USB > >> and still cannot reach RET. > >> > >> Am I missing some other patches for OMAP4? > > > > You need also fixes for sl2if and mcpdm in addition to above. > > Are they in some lo branch already? The old version of these patches are in the 'sl2if_mcpdm_reset_fix_3.5rc` branch of git://git.pwsan.com/linux-2.6 - they haven't yet been updated and tested per Benoît's comments. If someone else wants to take that over for 3.5-rc, by all means please do. - Paul
Paul Walmsley <paul@pwsan.com> writes: > Hi Benoît > > On Wed, 4 Jul 2012, Benoit Cousson wrote: > >> > @@ -1141,8 +1144,16 @@ static void _enable_sysc(struct omap_hwmod *oh) >> > sf = oh->class->sysc->sysc_flags; >> > >> > if (sf & SYSC_HAS_SIDLEMODE) { >> > - idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? >> > - HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; >> > + clkdm_act = ((oh->clkdm && >> > + oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) || >> > + (oh->_clk->clkdm && >> >> This is crashing on OMAP4 due to a NULL oh->_clk that can happen on some >> hwmod. >> >> + (oh->_clk && oh->_clk->clkdm && >> >> Is fixing the issue. > > Thanks, just made the change and pushed the patch up to > git://git.pwsan.com/linux-2.6 in the branch 'omap_fixes_c_3.5rc' OK, to ensure this fix gets into v3.5-rc, I'm taking the version from this branch and queuing up as a PM fix Tony. Kevin
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index f7b5860..6227e95 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -31,12 +31,16 @@ * * CLKDM_NO_AUTODEPS: Prevent "autodeps" from being added/removed from this * clockdomain. (Currently, this applies to OMAP3 clockdomains only.) + * CLKDM_ACTIVE_WITH_MPU: The PRCM guarantees that this clockdomain is + * active whenever the MPU is active. True for interconnects and + * the WKUP clockdomains. */ #define CLKDM_CAN_FORCE_SLEEP (1 << 0) #define CLKDM_CAN_FORCE_WAKEUP (1 << 1) #define CLKDM_CAN_ENABLE_AUTO (1 << 2) #define CLKDM_CAN_DISABLE_AUTO (1 << 3) #define CLKDM_NO_AUTODEPS (1 << 4) +#define CLKDM_ACTIVE_WITH_MPU (1 << 5) #define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO) #define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP) diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c index 839145e..4972219 100644 --- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c +++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c @@ -88,4 +88,5 @@ struct clockdomain wkup_common_clkdm = { .name = "wkup_clkdm", .pwrdm = { .name = "wkup_pwrdm" }, .dep_bit = OMAP_EN_WKUP_SHIFT, + .flags = CLKDM_ACTIVE_WITH_MPU, }; diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index c534258..7f2133a 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c @@ -381,7 +381,7 @@ static struct clockdomain l4_wkup_44xx_clkdm = { .cm_inst = OMAP4430_PRM_WKUP_CM_INST, .clkdm_offs = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS, .dep_bit = OMAP4430_L4WKUP_STATDEP_SHIFT, - .flags = CLKDM_CAN_HWSUP, + .flags = CLKDM_CAN_HWSUP | CLKDM_ACTIVE_WITH_MPU, }; static struct clockdomain emu_sys_44xx_clkdm = { diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 7731936..f749546 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1124,15 +1124,18 @@ static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG * @oh: struct omap_hwmod * * - * If module is marked as SWSUP_SIDLE, force the module out of slave - * idle; otherwise, configure it for smart-idle. If module is marked - * as SWSUP_MSUSPEND, force the module out of master standby; - * otherwise, configure it for smart-standby. No return value. + * Ensure that the OCP_SYSCONFIG register for the IP block represented + * by @oh is set to indicate to the PRCM that the IP block is active. + * Usually this means placing the module into smart-idle mode and + * smart-standby, but if there is a bug in the automatic idle handling + * for the IP block, it may need to be placed into the force-idle or + * no-idle variants of these modes. No return value. */ static void _enable_sysc(struct omap_hwmod *oh) { u8 idlemode, sf; u32 v; + bool clkdm_act; if (!oh->class->sysc) return; @@ -1141,8 +1144,16 @@ static void _enable_sysc(struct omap_hwmod *oh) sf = oh->class->sysc->sysc_flags; if (sf & SYSC_HAS_SIDLEMODE) { - idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? - HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; + clkdm_act = ((oh->clkdm && + oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) || + (oh->_clk->clkdm && + oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU)); + if (clkdm_act && !(oh->class->sysc->idlemodes & + (SIDLE_SMART | SIDLE_SMART_WKUP))) + idlemode = HWMOD_IDLEMODE_FORCE; + else + idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? + HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; _set_slave_idlemode(oh, idlemode, &v); } @@ -1208,8 +1219,13 @@ static void _idle_sysc(struct omap_hwmod *oh) sf = oh->class->sysc->sysc_flags; if (sf & SYSC_HAS_SIDLEMODE) { - idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? - HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; + /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */ + if (oh->flags & HWMOD_SWSUP_SIDLE || + !(oh->class->sysc->idlemodes & + (SIDLE_SMART | SIDLE_SMART_WKUP))) + idlemode = HWMOD_IDLEMODE_FORCE; + else + idlemode = HWMOD_IDLEMODE_SMART; _set_slave_idlemode(oh, idlemode, &v); }