From patchwork Thu Nov 29 10:53:38 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Walmsley X-Patchwork-Id: 1821011 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 00E973FC23 for ; Thu, 29 Nov 2012 10:57:44 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Te1kU-00064U-Vc; Thu, 29 Nov 2012 10:53:43 +0000 Received: from utopia.booyaka.com ([74.50.51.50]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Te1kR-000648-HB for linux-arm-kernel@lists.infradead.org; Thu, 29 Nov 2012 10:53:40 +0000 Received: (qmail 28052 invoked by uid 1019); 29 Nov 2012 10:53:38 -0000 Date: Thu, 29 Nov 2012 10:53:38 +0000 (UTC) From: Paul Walmsley To: Jon Hunter Subject: Re: [PATCH 1/3] ARM: OMAP4: Update timer clock aliases In-Reply-To: <1352313782-21602-2-git-send-email-jon-hunter@ti.com> Message-ID: References: <1352313782-21602-1-git-send-email-jon-hunter@ti.com> <1352313782-21602-2-git-send-email-jon-hunter@ti.com> User-Agent: Alpine 2.00 (DEB 1167 2008-08-23) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121129_055339_744299_AF767511 X-CRM114-Status: GOOD ( 18.91 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-omap , linux-arm X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Hi Jon, On Wed, 7 Nov 2012, Jon Hunter wrote: > Commit "ARM: dts: OMAP4: Update timer addresses" updated the device-tree > names of the OMAP4 timers 5-7 because the default address for the timers > was changed from the L3 address to the MPU private address. When booting > with device-tree, this introduces a regression when attempting to set > the parent clock of timers 5-7 to the sys_clk_div_ck. Therefore, update > the clock aliases for timer 5-7 to reflect the updated device-tree name > for the timers. Reviewing my E-mail inbox, just saw that this one is marked as being needed for v3.8. Is that still the case? If so, we should ask Tony to take an updated version of this patch, given the recent CCF conversion. Following is the updated patch. - Paul From: Jon Hunter Date: Thu, 29 Nov 2012 03:47:46 -0700 Subject: [PATCH] ARM: OMAP4: Update timer clock aliases Commit "ARM: dts: OMAP4: Update timer addresses" updated the device-tree names of the OMAP4 timers 5-7 because the default address for the timers was changed from the L3 address to the MPU private address. When booting with device-tree, this introduces a regression when attempting to set the parent clock of timers 5-7 to the sys_clk_div_ck. Therefore, update the clock aliases for timer 5-7 to reflect the updated device-tree name for the timers. Signed-off-by: Jon Hunter [paul@pwsan.com: updated to apply after the CCF conversion] Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/cclock44xx_data.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c index aa56c3e..a1f0b55 100644 --- a/arch/arm/mach-omap2/cclock44xx_data.c +++ b/arch/arm/mach-omap2/cclock44xx_data.c @@ -1935,10 +1935,10 @@ static struct omap_clk omap44xx_clks[] = { CLK("4803e000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), CLK("48086000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), CLK("48088000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X), - CLK("49038000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), - CLK("4903a000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), - CLK("4903c000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), - CLK("4903e000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), + CLK("40138000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), + CLK("4013a000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), + CLK("4013c000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), + CLK("4013e000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X), CLK(NULL, "cpufreq_ck", &dpll_mpu_ck, CK_443X), };