[v2,5/5] OMAP4: hwmod data: Update AESS data with memory bank area

Commit Message

Paul Walmsley Feb. 10, 2013, 7:19 p.m. UTC

Hi

On Wed, 9 Jan 2013, Sebastien Guiriec wrote:

> Add AESS memory bank data in hwmod in order to provide memory
> address information to the driver.
> 
> Signed-off-by: sebastien Guiriec <[e-mail]>

Due to the cleanup of the CLKCTRL leaf clocks, this one has been updated 
to change the AESS main clock to be aess_fclk, and it's also been moved to 
precede the patch that enables the AESS hwmod.


- Paul


From: Sebastien Guiriec <[e-mail]>
Date: Sun, 10 Feb 2013 11:22:24 -0700
Subject: [PATCH] ARM: OMAP4: hwmod data: Update AESS data with memory bank
 area

Add AESS memory bank data in hwmod in order to provide memory address
information to the driver.

This version also changes the AESS main clock to use a
non-CLKCTRL-based functional clock.  These are being removed from the
clock data, since they should be handled by the IP block integration
code.  Without this change, the kernel crashes during boot.  Thanks to
Tony Lindgren for reporting this during a test merge.

Signed-off-by: Sebastien Guiriec <[e-mail]>
[[e-mail]: updated to change the AESS main_clk]
Cc: Tony Lindgren <[e-mail]>
Signed-off-by: Paul Walmsley <[e-mail]>
---
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c |   44 +++++++++++++++++++++++++++-
 1 file changed, 43 insertions(+), 1 deletion(-)

Patch

diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index c9c251e..a30c113 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -349,7 +349,7 @@  static struct omap_hwmod omap44xx_aess_hwmod = {
 	.clkdm_name	= "abe_clkdm",
 	.mpu_irqs	= omap44xx_aess_irqs,
 	.sdma_reqs	= omap44xx_aess_sdma_reqs,
-	.main_clk	= "aess_fck",
+	.main_clk	= "aess_fclk",
 	.prcm = {
 		.omap4 = {
 			.clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET,
@@ -4250,6 +4250,27 @@  static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp_wp_noc = {
 
 static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = {
 	{
+		.name		= "dmem",
+		.pa_start	= 0x40180000,
+		.pa_end		= 0x4018ffff
+	},
+	{
+		.name		= "cmem",
+		.pa_start	= 0x401a0000,
+		.pa_end		= 0x401a1fff
+	},
+	{
+		.name		= "smem",
+		.pa_start	= 0x401c0000,
+		.pa_end		= 0x401c5fff
+	},
+	{
+		.name		= "pmem",
+		.pa_start	= 0x401e0000,
+		.pa_end		= 0x401e1fff
+	},
+	{
+		.name		= "mpu",
 		.pa_start	= 0x401f1000,
 		.pa_end		= 0x401f13ff,
 		.flags		= ADDR_TYPE_RT
@@ -4268,6 +4289,27 @@  static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_abe__aess = {
 
 static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = {
 	{
+		.name		= "dmem_dma",
+		.pa_start	= 0x49080000,
+		.pa_end		= 0x4908ffff
+	},
+	{
+		.name		= "cmem_dma",
+		.pa_start	= 0x490a0000,
+		.pa_end		= 0x490a1fff
+	},
+	{
+		.name		= "smem_dma",
+		.pa_start	= 0x490c0000,
+		.pa_end		= 0x490c5fff
+	},
+	{
+		.name		= "pmem_dma",
+		.pa_start	= 0x490e0000,
+		.pa_end		= 0x490e1fff
+	},
+	{
+		.name		= "dma",
 		.pa_start	= 0x490f1000,
 		.pa_end		= 0x490f13ff,
 		.flags		= ADDR_TYPE_RT