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Fri, 23 Aug 2019 15:00:25 +0800 From: Chunfeng Yun To: Kishon Vijay Abraham I , Rob Herring Subject: [PATCH 07/11] phy: phy-mtk-tphy: add a property for internal resistance Date: Fri, 23 Aug 2019 15:00:14 +0800 Message-ID: X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: References: MIME-Version: 1.0 X-TM-SNTS-SMTP: 952336DE87F3F03337E20D5B2966AF5FF1C4F4806F1A6D24A4980637340DBAEE2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190823_000040_521571_61915F3D X-CRM114-Status: GOOD ( 11.67 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [216.200.240.184 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chunfeng Yun , linux-mediatek@lists.infradead.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This is used to tune internal resistance for J-K test Signed-off-by: Chunfeng Yun --- drivers/phy/mediatek/phy-mtk-tphy.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c b/drivers/phy/mediatek/phy-mtk-tphy.c index 5afe33621dbc..4a2dc92f10f5 100644 --- a/drivers/phy/mediatek/phy-mtk-tphy.c +++ b/drivers/phy/mediatek/phy-mtk-tphy.c @@ -43,6 +43,8 @@ #define PA0_RG_USB20_INTR_EN BIT(5) #define U3P_USBPHYACR1 0x004 +#define PA1_RG_INTR_CAL GENMASK(23, 19) +#define PA1_RG_INTR_CAL_VAL(x) ((0x1f & (x)) << 19) #define PA1_RG_VRT_SEL GENMASK(14, 12) #define PA1_RG_VRT_SEL_VAL(x) ((0x7 & (x)) << 12) #define PA1_RG_TERM_SEL GENMASK(10, 8) @@ -302,6 +304,7 @@ struct mtk_phy_instance { int eye_src; int eye_vrt; int eye_term; + int intr; int discth; bool bc12_en; }; @@ -853,12 +856,14 @@ static void phy_parse_property(struct mtk_tphy *tphy, &instance->eye_vrt); device_property_read_u32(dev, "mediatek,eye-term", &instance->eye_term); + device_property_read_u32(dev, "mediatek,intr", + &instance->intr); device_property_read_u32(dev, "mediatek,discth", &instance->discth); - dev_dbg(dev, "bc12:%d, src:%d, vrt:%d, term:%d, disc:%d\n", + dev_dbg(dev, "bc12:%d, src:%d, vrt:%d, term:%d, intr:%d, disc:%d\n", instance->bc12_en, instance->eye_src, instance->eye_vrt, instance->eye_term, - instance->discth); + instance->intr, instance->discth); } static void u2_phy_props_set(struct mtk_tphy *tphy, @@ -895,6 +900,13 @@ static void u2_phy_props_set(struct mtk_tphy *tphy, writel(tmp, com + U3P_USBPHYACR1); } + if (instance->intr) { + tmp = readl(com + U3P_USBPHYACR1); + tmp &= ~PA1_RG_INTR_CAL; + tmp |= PA1_RG_INTR_CAL_VAL(instance->intr); + writel(tmp, com + U3P_USBPHYACR1); + } + if (instance->discth) { tmp = readl(com + U3P_USBPHYACR6); tmp &= ~PA6_RG_U2_DISCTH;